Patents by Inventor Guy Larri

Guy Larri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11809836
    Abstract: A system includes a fixed-point accumulator for storing numbers in an anchored fixed-point number format, a data interface arranged to receive a plurality of weight values and a plurality of data values represented in a floating-point number format, and logic circuitry. The logic circuitry is configured to: determine an anchor value indicative of a value of a lowest significant bit of the anchored fixed-point number format; convert at least a portion of the plurality of data values to the anchored fixed-point number format; perform MAC operations between the converted at least portion and respective weight values, using fixed-point arithmetic, to generate an accumulation value in the anchored fixed-point number format; and determine an output element of a later of a neural network in dependence on the accumulation value.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: November 7, 2023
    Assignee: Arm Limited
    Inventors: Daren Croxford, Guy Larri
  • Publication number: 20230315510
    Abstract: An apparatus and method are provided for handling transactions in a system employing transactional memory. The apparatus has processing circuitry for performing data processing in response to instructions, and transactional memory support circuitry for supporting execution of a transaction within a thread of data processing by the processing circuitry. The transaction comprises a sequence of instructions executed speculatively and for which the processing circuitry prevents commitment of results of those instructions until the transaction has reached a transaction end point. The transactional memory support circuitry comprises abort event detection circuitry that causes execution of the transaction to be aborted when an abort event is detected before the transaction has reached the transaction end point, and which causes abort status information to be stored for later reference when determining whether to retry execution of the transaction.
    Type: Application
    Filed: August 2, 2021
    Publication date: October 5, 2023
    Inventors: Timothy HAYES, David Hennah MANSELL, Alasdair GRANT, Guy LARRI
  • Publication number: 20230259605
    Abstract: An apparatus comprises processing circuitry to execute instructions, and decode circuitry to decode the instructions for execution by the processing circuitry. The decode circuitry is responsive to an authentication code generation instruction specifying a first source value to control the processing circuitry to generate an authentication code dependent on the first source value, and store the authentication code to a memory location associated with a store address formed using a value obtained from a register. By providing a single instruction, this reduces register pressure enabling improved performance by avoiding unnecessary load/store operations, and makes compilation of code using the authentication code generation instruction simpler.
    Type: Application
    Filed: June 23, 2021
    Publication date: August 17, 2023
    Inventor: Guy LARRI
  • Patent number: 11562715
    Abstract: When a graphics processor is processing data for an application on a host processor, the graphics processor generates in advance of their being required for display by the application a plurality of frame sequences corresponding to a plurality of different possible “future states” for the application. The graphics processing system, when producing a frame in a sequence of frames corresponding to a given future state for the application, determines one or more region(s) of the frame that are to be produced at a first, higher quality, and producing the determined region(s) of the frame at a first, higher quality, whereas other regions of the frame are produced at a second, lower quality.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: January 24, 2023
    Assignee: Arm Limited
    Inventors: Daren Croxford, Guy Larri
  • Patent number: 11513597
    Abstract: A human-machine interface system comprises a sensor configured to generate data associated with a human movement, such as measured electrical signals or data from an accelerometer. A measurement unit of the human-machine interface measures user movement over time to generate a sequence of measured user movement data. A processor processes the data associated with a human movement from the sensor using a trained neural network to determine one or more predicted user actions. A comparison unit compares the one or more predicted user actions with one or more user actions obtained from the sequence of measured user movement data. A control unit uses the predicted user actions to control a process in an information processing apparatus in dependence upon the comparison performed by the comparison unit.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: November 29, 2022
    Assignee: Arm Limited
    Inventors: Daren Croxford, Guy Larri
  • Publication number: 20220319090
    Abstract: Disclosed subject matter relates generally to predictive graphics processing for interactive content.
    Type: Application
    Filed: March 31, 2021
    Publication date: October 6, 2022
    Inventors: Daren Croxford, Guy Larri
  • Publication number: 20220308667
    Abstract: A human-machine interface system comprises a sensor configured to generate data associated with a human movement, such as measured electrical signals or data from an accelerometer. A measurement unit of the human-machine interface measures user movement over time to generate a sequence of measured user movement data. A processor processes the data associated with a human movement from the sensor using a trained neural network to determine one or more predicted user actions. A comparison unit compares the one or more predicted user actions with one or more user actions obtained from the sequence of measured user movement data. A control unit uses the predicted user actions to control a process in an information processing apparatus in dependence upon the comparison performed by the comparison unit.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 29, 2022
    Inventors: Daren CROXFORD, Guy LARRI
  • Publication number: 20220253966
    Abstract: The present disclosure relates to a method of operating a graphics processing system for providing frames over communication channel in a communication network, the graphics processing system being configured to process data for an application executed thereon to render frames for the application to be output for transmission over the communication channel to a client device, the method comprising: determining network characteristics of the communication network and/or server characteristics of the server; adaptively selecting a first prediction method from a plurality of prediction methods to be used for displaying frames based on the determined network characteristics and/or server characteristics; generating a plurality of frames based on the first prediction method; and selectively providing, based on the first prediction method, one or more output frames from the plurality of frames to the application to be output for transmission over the communication channel.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 11, 2022
    Applicant: Arm Limited
    Inventors: Daren Croxford, Guy Larri, Julian Katenbrink
  • Publication number: 20220068243
    Abstract: When a graphics processor is processing data for an application on a host processor, the graphics processor generates in advance of their being required for display by the application a plurality of frame sequences corresponding to a plurality of different possible “future states” for the application. The graphics processing system, when producing a frame in a sequence of frames corresponding to a given future state for the application, determines one or more region(s) of the frame that are to be produced at a first, higher quality, and producing the determined region(s) of the frame at a first, higher quality, whereas other regions of the frame are produced at a second, lower quality.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Applicant: Arm Limited
    Inventors: Daren Croxford, Guy Larri
  • Publication number: 20220066739
    Abstract: A system includes a fixed-point accumulator for storing numbers in an anchored fixed-point number format, a data interface arranged to receive a plurality of weight values and a plurality of data values represented in a floating-point number format, and logic circuitry. The logic circuitry is configured to: determine an anchor value indicative of a value of a lowest significant bit of the anchored fixed-point number format; convert at least a portion of the plurality of data values to the anchored fixed-point number format; perform MAC operations between the converted at least portion and respective weight values, using fixed-point arithmetic, to generate an accumulation value in the anchored fixed-point number format; and determine an output element of a later of a neural network in dependence on the accumulation value.
    Type: Application
    Filed: August 27, 2020
    Publication date: March 3, 2022
    Inventors: Daren CROXFORD, Guy LARRI
  • Publication number: 20210151032
    Abstract: A speech recognition circuit comprising a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to the state identifiers, the lexical tree comprising a model of words.
    Type: Application
    Filed: October 21, 2020
    Publication date: May 20, 2021
    Applicant: Zenitian Limited
    Inventors: Guy Larri, Mark Catchpole, Damian Kelly Harris-Dowsett, Timothy Brian Reynolds
  • Patent number: 10908944
    Abstract: An apparatus (2) with multiple processing elements (4, 6, 8) has shared transactional processing resources (10, 50, 75) for supporting processing of transactions, which comprise operations performed speculatively following a transaction start event whose results are committed following a transaction end event. The transactional processing resources may have a significant overhead and sharing these between the processing elements helps reduce energy consumption and circuit area.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: February 2, 2021
    Assignee: ARM LIMITED
    Inventors: Stephan Diestelhorst, Matthew James Horsnell, Guy Larri
  • Patent number: 10839789
    Abstract: An acoustic coprocessor is provided. The acoustic coprocessor may include an interface for receiving at least one feature vector and a calculating apparatus for calculating distances indicating the similarity between the at least one feature vector and at least one acoustic state of an acoustic model read from an acoustic model memory. The acoustic coprocessor may also include an interface for sending at least one distance calculated by the calculating apparatus.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: November 17, 2020
    Assignee: Zentian Limited
    Inventors: Guy Larri, Mark Catchpole, Damian Kelly Harris-Dowsett, Timothy Brian Reynolds
  • Patent number: 10572299
    Abstract: An apparatus (2) has processing circuitry (6) having access to a first processing resource (20-0) and a second processing resource (20-3). A first thread can be processed using the first processing resource. In a thread mode the second processing resource (20-3) can be used to process a second thread while in a transaction mode the second processing resource (20-3) can be used to process a transaction of the first thread comprising a number of speculatively performed operations for which results are committed at the end of the transaction. By sharing resources for supporting additional threads and supporting transactions, circuit area and power consumption can be reduced.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: February 25, 2020
    Assignee: ARM Limited
    Inventors: Stephan Diestelhorst, Matthew James Horsnell, Guy Larri
  • Publication number: 20190043485
    Abstract: A speech recognition circuit comprising a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to the state identifiers, the lexical tree comprising a model of words.
    Type: Application
    Filed: August 8, 2018
    Publication date: February 7, 2019
    Inventors: Guy Larri, Mark Catchpole, Damian Kelly Harris-Dowsett, Timothy Brian Reynolds
  • Patent number: 10062377
    Abstract: A speech recognition circuit comprising a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to said state identifiers, the lexical tree comprising a model of words.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: August 28, 2018
    Assignee: Zentian Limited
    Inventors: Guy Larri, Mark Catchpole, Damian Kelly Harris-Dowsett, Timothy Brian Reynolds
  • Patent number: 9886239
    Abstract: A processing apparatus includes floating point arithmetic circuitry coupled to monitoring circuitry. The monitoring circuitry stores exponent limit data indicating at least one of a maximum exponent value and a minimum exponent value processed when performing the floating point arithmetic operations. The monitoring circuitry may be selectively enabled in dependence upon a virtual machine identifier, an application specific identifier or a program counter value range. Exponent limit data may be gathered in respect of different portions of the floating point arithmetic circuitry and/or may be aggregated to form global exponent limit data for the system.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: February 6, 2018
    Assignee: ARM Limited
    Inventors: Guy Larri, Lee Douglas Smith, David Raymond Lutz, Alastair David Reid
  • Patent number: 9864694
    Abstract: A cache is provided comprising a plurality of ways, each way of the plurality of ways comprising a data array, wherein a data item stored by the cache is stored in the data array of one of the plurality of ways. A way tracker of the cache has a plurality of entries, each entry of the plurality of entries for storing a data item identifier and for storing, in association with the data item identifier, an indication of a selected way of the plurality of ways to indicate that a data item identified by the data item identifier is stored in the selected way. Each entry of the way tracker is further for storing a miss indicator in association with the data item identifier, wherein the miss indicator is set by the cache when a lookup for a data item identified by that data item identifier has resulted in a cache miss. A corresponding method of caching data is also provided.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: January 9, 2018
    Assignee: ARM Limited
    Inventors: Miles Robert Dooley, Todd Rafacz, Guy Larri
  • Publication number: 20170329626
    Abstract: An apparatus (2) has processing circuitry (6) having access to a first processing resource (20-0) and a second processing resource (20-3). A first thread can be processed using the first processing resource. In a thread mode the second processing resource (20-3) can be used to process a second thread while in a transaction mode the second processing resource (20-3) can be used to process a transaction of the first thread comprising a number of speculatively performed operations for which results are committed at the end of the transaction. By sharing resources for supporting additional threads and supporting transactions, circuit area and power consumption can be reduced.
    Type: Application
    Filed: November 24, 2015
    Publication date: November 16, 2017
    Inventors: Stephan DIESTELHORST, Matthew James HORSNELL, Guy LARRI
  • Publication number: 20170269960
    Abstract: An apparatus (2) with multiple processing elements (4, 6, 8) has shared transactional processing resources (10, 50, 75) for supporting processing of transactions, which comprise operations performed speculatively following a transaction start event whose results are committed following a transaction end event. The transactional processing resources may have a significant overhead and sharing these between the processing elements helps reduce energy consumption and circuit area.
    Type: Application
    Filed: November 24, 2015
    Publication date: September 21, 2017
    Inventors: Stephan DIESTELHORST, Matthew James HORSNELL, Guy LARRI