Abstract: A method for fabricating field emitters from a conductive or semiconductive substrate. A layer of low work function material may be formed on the substrate. Emission tips that include such a low work function material may have improved performance. An etch mask appropriate for forming emission tips is patterned at desired locations over the substrate and any low work function material thereover. An anisotropic etch of at least the substrate is conducted to form vertical columns therefrom. A sacrificial layer may then be formed over the vertical columns. A facet etch of each vertical column forms an emission tip of the desired shape. If a sacrificial layer was formed over the vertical columns prior to formation of emission tips therefrom, the remaining material of the sacrificial layer may be utilized to facilitate the removal of any redeposition materials formed during the facet etch.

Abstract: A resonator for thermo optic devices is formed in the same process steps as a waveguide and is formed in a depression of a lower cladding while the waveguide is formed on a surface of the lower cladding. Since upper surfaces of the resonator and waveguide are substantially coplanar, the aspect ratio, as between the waveguide and resonator in an area where the waveguide and resonator front one another, decreases thereby increasing the bandwidth of the resonator. The depression is formed by photomasking and etching the lower cladding before forming the resonator and waveguide. Pluralities of resonators are also taught that are formed in a plurality of depressions of the lower cladding. To decrease resonator bandwidth, waveguide(s) are formed in the depression(s) of the lower cladding while the resonator is formed on the surface. Thermo optic devices formed with these resonators are also taught.

Abstract: A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.

Abstract: Resistive heaters formed in two mask counts on a surface of a grating of a thermo optic device thereby eliminating one mask count from prior art manufacturing methods. The resistive heater is comprised of a heater region and a conductive path region formed together in a first mask count from a relatively high resistance material. A conductor formed from a relatively low resistance material is formed directly on the conductive path region in a second mask count. Thermo optic devices formed by these two mask count methods are also described.

Abstract: A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber.

Abstract: A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.

Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable material.

Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.

Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed resilient flexible material member contacting the wafer.

Abstract: Methods and apparatuses for planarizing a microelectronic substrate. In one embodiment, a planarizing pad for mechanical or chemical-mechanical planarization includes a base section and a plurality of embedded sections. The base section has a planarizing surface, and the base section is composed of a first material. The embedded sections are arranged in a desired pattern of voids, and each embedded section has a top surface below the planarizing surface to define a plurality of voids in the base section. The embedded sections are composed of a second material that is selectively removable from the first material. A planarizing pad in accordance with an embodiment of the invention can be made by constructing the embedded sections in the base section and then removing a portion of the embedded sections from the base section. By removing only a portion of the embedded sections, this procedure creates the plurality of voids in the base section and leaves the remaining portions of the embedded sections.

Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.

Abstract: A selective dry etch process includes use of an etchant that includes C2HxFy, where x is an integer from three to five, inclusive, where y is an integer from one to three, inclusive, and where x plus y equals six. The etchant etches doped silicon dioxide with selectivity over both undoped silicon dioxide and silicon nitride. Thus, undoped silicon dioxide and silicon nitride may be employed as etch stops in dry etch processes which utilize the C2HxFy-containing etchant. C2HxFy may be employed as either a primary etchant or as an additive to another etchant or etchant mixture.

Abstract: In connection with wafer planarization, an apparatus for forming a layer of material having a substantially uniform thickness and substantially parallel first and second major surfaces includes a pair of pressing elements and a stop. Each of the pair of pressing elements has a flat pressing surface. The pressing surfaces are opposed to one another and operable to compress a quantity of the material therebetween. The stop is positioned at least partially between the pressing surfaces and has a thickness substantially equal to the desired uniform thickness of the layer. The stop is positioned to establish a spacing between the flat pressing surfaces that is substantially equal to the thickness of the stop and thereby to the desired uniform thickness of the layer when the pressing elements engage the stop.

Abstract: A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.

Abstract: A capacitor structure and method of forming it are described. In particular, a high-K dielectric oxide is provided as the capacitor dielectric. The high-K dielectric is deposited in a series of thin layers and oxidized in a series of oxidation steps, as opposed to a depositing a single thick layer. Further, at least one of the oxidation steps is less aggressive than the oxidation environment or environments that would be used to deposit the single thick layer. This allows greater control over oxidizing the dielectric and other components beyond the dielectric.

Abstract: A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber.

Abstract: Sensors and methods of monitoring for the presence of gas phase materials by detecting the formation of films based on the gas phase material are disclosed. Advantageously, some gas phase materials preferentially deposit on specific surfaces. As a result, selective detection of those gas phase materials can be obtained by detecting films deposited on those detection surfaces. Examples of gas phase materials that may be detected include RuO4, IrO4 and RhO4.

Abstract: A cleaning method in a semiconductor fabrication process includes providing a dilute composition consisting essentially of phosphoric acid and acetic acid and exposing a surface, e.g., aluminum, to the dilute composition. For example, the dilute composition includes phosphoric acid at a concentration of about 5% or less by volume and acetic acid at a concentration of about 30% or less by volume. Further, the cleaning method may use a composition comprising phosphoric acid and acetic acid, wherein the composition includes phosphoric acid at a concentration of X%, wherein X is about 5% by volume or less, and acetic acid at a concentration of about (100−X%) by volume or less. The cleaning method may be used, for example, in fabricating interconnect structures, aluminum containing structures, and multilevel interconnect structures. Cleaning compositions for use in the cleaning methods are also provided.

Abstract: A method of manufacturing semiconductor devices using an improved planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed resilient flexible material member contacting the wafer.

Abstract: An ion bombardment sputter etch of a layer to be etched is performed in an inert gas plasma including therein a small amount of a heavy halogen gas, such as iodine or bromine. The heavy halogen gas, in the form ions that are ionized by the plasma and halogen molecules, have the effect of bonding with the material of the layer to be etched, decreasing the sputter rate at areas normal to the ion bombardment, relative to the sputter rate at areas at an angle to the ion bombardmen. The redeposition rate of material sputtered from areas at an angle is also increased. A small amount of oxygen may also be included in the plasma to enhance the above effects.