Patents by Inventor Gwan Sin Chang

Gwan Sin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230367225
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 16, 2023
    Inventors: Tai-Yu CHEN, Sagar Deepak KHIVSARA, Kuo-An LIU, Chieh HSIEH, Shang-Chieh CHIEN, Gwan-Sin CHANG, Kai Tak LAM, Li-Jui CHEN, Heng-Hsin LIU, Chung-Wei WU, Zhiqiang WU
  • Patent number: 11768437
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yu Chen, Sagar Deepak Khivsara, Kuo-An Liu, Chieh Hsieh, Shang-Chieh Chien, Gwan-Sin Chang, Kai Tak Lam, Li-Jui Chen, Heng-Hsin Liu, Chung-Wei Wu, Zhiqiang Wu
  • Publication number: 20220350257
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 3, 2022
    Inventors: Tai-Yu CHEN, Sagar Deepak KHIVSARA, Kuo-An LIU, Chieh HSIEH, Shang-Chieh CHIEN, Gwan-Sin CHANG, Kai Tak LAM, Li-Jui CHEN, Heng-Hsin LIU, Chung-Wei WU, Zhiqiang WU
  • Patent number: 11392040
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: July 19, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Yu Chen, Sagar Deepak Khivsara, Kuo-An Liu, Chieh Hsieh, Shang-Chieh Chien, Gwan-Sin Chang, Kai Tak Lam, Li-Jui Chen, Heng-Hsin Liu, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11201243
    Abstract: The current disclosure describes techniques for forming a gate-all-around device where semiconductor layers are released by etching out the buffer layers that are vertically stacked between semiconductor layers in an alternating manner. The buffer layers stacked at different vertical levels include different material compositions, which bring about different etch rates with respect to an etchant that is used to remove at least partially the buffer layers to release the semiconductor layers.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: December 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chansyun David Yang, Han-Yu Lin, Chun-Yu Chen, Chih-Ching Wang, Fang-Wei Lee, Tze-Chung Lin, Li-Te Lin, Gwan-Sin Chang, Pinyen Lin
  • Publication number: 20210349396
    Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.
    Type: Application
    Filed: March 5, 2021
    Publication date: November 11, 2021
    Inventors: Tai-Yu CHEN, Sagar Deepak KHIVSARA, Kuo-An LIU, Chieh HSIEH, Shang-Chieh CHIEN, Gwan-Sin CHANG, Kai Tak LAM, Li-Jui CHEN, Heng-Hsin LIU, Chung-Wei WU, Zhiqiang WU
  • Patent number: 11139341
    Abstract: In some embodiments, the present application provides a memory device. The memory device includes a chip that includes a magnetic random access memory (MRAM) cell. A magnetic-field-shielding structure comprised of conductive or magnetic material at least partially surrounds the chip. The magnetic-field-shielding structure comprises a sidewall region that laterally surrounds the chip, an upper region extending upward from the sidewall region, and a lower region extending downward from the sidewall region. At least one of the upper region and/or lower region terminate at an opening over the chip.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: October 5, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-An Liu, Chung-Cheng Wu, Harry-Hak-Lay Chuang, Gwan-Sin Chang, Tien-Wei Chiang, Zhiqiang Wu, Chia-Hsiang Chen
  • Publication number: 20210305409
    Abstract: A semiconductor device includes a substrate having a semiconductor fin. A gate structure is over the semiconductor fin, in which the gate structure has a tapered profile and comprises a gate dielectric. A work function metal layer is over the gate dielectric, and a filling metal is over the work function metal layer. A gate spacer is along a sidewall of the gate structure, in which the work function metal layer is in contact with the gate dielectric and a top portion of the gate spacer. An epitaxy structure is over the semiconductor fin.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 30, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Qiang WU, Kuo-An LIU, Chan-Lon YANG, Bharath Kumar PULICHERLA, Li-Te LIN, Chung-Cheng WU, Gwan-Sin CHANG, Pinyen LIN
  • Patent number: 11075282
    Abstract: A method includes forming a gate layer over a semiconductor fin; forming a patterned mask over the gate layer; performing a first etching process to pattern the gate layer using the patterned mask as an etch mask, the patterned gate layer comprising a first gate extending across the semiconductor fin; depositing, by using an directional ion beam, a protection layer to wrap around a top surface, a first sidewall and a second sidewall of the first gate, the protection layer extending along the first and second sidewalls of the first gate towards a bottom surface of the first gate without extending to the bottom surface of the first gate on the second sidewall of the first gate; and after depositing the protection layer, performing a second etching process to a portion of the second sidewall of the first gate exposed by the protection layer.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: July 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-An Liu, Chan-Lon Yang, Bharath Kumar Pulicherla, Zhi-Qiang Wu, Chung-Cheng Wu, Chih-Han Lin, Gwan-Sin Chang
  • Patent number: 11043579
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor fin on a substrate. A dummy gate structure is formed crossing the semiconductor fin. The dummy gate structure is replaced with a metal gate structure. An epitaxial structure is formed in the semiconductor fin after replacing the dummy gate structure with the metal gate structure.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: June 22, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Wang, Wai-Yi Lien, Gwan-Sin Chang, Yu-Ming Lin, Ching Hsueh, Jia-Chuan You, Chia-Hao Chang
  • Patent number: 11024721
    Abstract: A method includes forming a dummy gate over a substrate. A pair of gate spacers are formed on opposite sidewalls of the dummy gate. The dummy gate is removed to form a trench between the gate spacers. A first ion beam is directed to an upper portion of the trench, while leaving a lower portion of the trench substantially free from incidence of the first ion beam. The substrate is moved relative to the first ion beam during directing the first ion beam to the trench. A gate structure is formed in the trench.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Qiang Wu, Kuo-An Liu, Chan-Lon Yang, Bharath Kumar Pulicherla, Li-Te Lin, Chung-Cheng Wu, Gwan-Sin Chang, Pinyen Lin
  • Publication number: 20210066490
    Abstract: The current disclosure describes techniques for forming a gate-all-around device where semiconductor layers are released by etching out the buffer layers that are vertically stacked between semiconductor layers in an alternating manner. The buffer layers stacked at different vertical levels include different material compositions, which bring about different etch rates with respect to an etchant that is used to remove at least partially the buffer layers to release the semiconductor layers.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 4, 2021
    Inventors: Chansyun David Yang, Han-Yu Lin, Chun-Yu Chen, Chih-Ching Wang, Fang-Wei Lee, Tze-Chung LIN, Li-Te LIN, Gwan-Sin Chang, Pinyen LIN
  • Patent number: 10937909
    Abstract: Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs), and disclosed are the associated devices. An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: March 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Gwan-Sin Chang, Kuo-Cheng Ching, Zhiqiang Wu
  • Patent number: 10871647
    Abstract: An EUV collector mirror for an extreme ultra violet (EUV) radiation source apparatus includes an EUV collector mirror body on which a reflective layer as a reflective surface is disposed, a trajectory correcting device attached to or embedded in the EUV collector mirror body and a trajectory correcting device to adjust the trajectory of metal from the reflective surface of the EUV collector mirror body to an opposite side of the EUV collector mirror body.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-An Liu, Gwan-Sin Chang, Bharath Kumar Pulicherla, Li-Jui Chen, Sheng-Kang Yu, Chung-Cheng Wu, Zhiqiang Wu
  • Publication number: 20200350422
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor fin on a substrate. A dummy gate structure is formed crossing the semiconductor fin. The dummy gate structure is replaced with a metal gate structure. An epitaxial structure is formed in the semiconductor fin after replacing the dummy gate structure with the metal gate structure.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao WANG, Wai-Yi LIEN, Gwan-Sin CHANG, Yu-Ming LIN, Ching HSUEH, Jia-Chuan YOU, Chia-Hao CHANG
  • Publication number: 20200321459
    Abstract: Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs), and disclosed are the associated devices. An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin.
    Type: Application
    Filed: April 20, 2020
    Publication date: October 8, 2020
    Inventors: Chih-Hao WANG, Gwan-Sin CHANG, Kuo-Cheng CHING, Zhiqiang WU
  • Patent number: 10720514
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a semiconductor fin, a first gate stack, and a first metal element-containing dielectric mask. The semiconductor fin protrudes from the substrate. The first gate stack is over the semiconductor fin. The first metal element-containing dielectric mask is over the first gate stack.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: July 21, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hao Wang, Wai-Yi Lien, Gwan-Sin Chang, Yu-Ming Lin, Ching Hsueh, Jia-Chuan You, Chia-Hao Chang
  • Patent number: 10629737
    Abstract: Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs). An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: April 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Gwan-Sin Chang, Kuo-Cheng Ching, Zhiqiang Wu
  • Publication number: 20200111893
    Abstract: A method includes forming a gate layer over a semiconductor fin; forming a patterned mask over the gate layer; performing a first etching process to pattern the gate layer using the patterned mask as an etch mask, the patterned gate layer comprising a first gate extending across the semiconductor fin; depositing, by using an directional ion beam, a protection layer to wrap around a top surface, a first sidewall and a second sidewall of the first gate, the protection layer extending along the first and second sidewalls of the first gate towards a bottom surface of the first gate without extending to the bottom surface of the first gate on the second sidewall of the first gate; and after depositing the protection layer, performing a second etching process to a portion of the second sidewall of the first gate exposed by the protection layer.
    Type: Application
    Filed: November 19, 2019
    Publication date: April 9, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-An LIU, Chan-Lon YANG, Bharath Kumar PULICHERLA, Zhi-Qiang WU, Chung-Cheng WU, Chih-Han LIN, Gwan-Sin CHANG
  • Publication number: 20200098890
    Abstract: A method includes forming a dummy gate over a substrate. A pair of gate spacers are formed on opposite sidewalls of the dummy gate. The dummy gate is removed to form a trench between the gate spacers. A first ion beam is directed to an upper portion of the trench, while leaving a lower portion of the trench substantially free from incidence of the first ion beam. The substrate is moved relative to the first ion beam during directing the first ion beam to the trench. A gate structure is formed in the trench.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 26, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Zhi-Qiang WU, Kuo-An LIU, Chan-Lon YANG, Bharath Kumar PULICHERLA, Li-Te LIN, Chung-Cheng WU, Gwan-Sin CHANG, Pinyen LIN