Patents by Inventor Gwang-Man Lim

Gwang-Man Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150054144
    Abstract: Provided sa a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 26, 2015
    Inventors: Chul Park, Hyeong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Patent number: 8901750
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Park, Hyeong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Publication number: 20140225281
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Application
    Filed: April 11, 2014
    Publication date: August 14, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chul Park, Hyeong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Publication number: 20140145315
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate, a connection member formed on a top surface of the substrate, a semiconductor package mounted on the connection member, an encapsulation member formed to fill a space between a top portion of the substrate and a bottom portion of the semiconductor package, and a shielding material formed to cover the semiconductor package and the encapsulation member.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 29, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man LIM
  • Patent number: 8723333
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: May 13, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Park, Hysong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Publication number: 20140022733
    Abstract: A storage device includes: a first semiconductor device mounted on a substrate; a housing accommodating the substrate, with the substrate fixed on a first fixing unit that is coupled to a first surface of the housing; and a first thermal conductive plate disposed between the first semiconductor device and the housing, with the first thermal conductive plate thermally connected to the housing, wherein the first thermal conductive plate has a thermal conductivity that is higher than that of the substrate. Thus, the storage device may dissipate heat generated by the semiconductor device rapidly to the outside or away from the storage device.
    Type: Application
    Filed: July 16, 2013
    Publication date: January 23, 2014
    Inventors: Gwang-Man Lim, Jae-bum Byun
  • Patent number: 8625323
    Abstract: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man Lim
  • Patent number: 8493706
    Abstract: A semiconductor module and a data memory module having the same are provided. The semiconductor module includes a substrate having a semiconductor device, a ground terminal, a protection pattern, and a switching element. The ground terminal and the protection pattern are formed on the substrate. The switching element connects the ground terminal and the protection pattern in series. The switching element electrically connects the protection pattern and the ground terminal when a voltage applied to the substrate is beyond a set voltage range.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: July 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man Lim
  • Publication number: 20130028033
    Abstract: Disclosed is a memory module which includes a memory chip; an external input/output terminal having an electrical signal input/output terminal and an optical signal input/output terminal; an optical signal processor configured to convert a first optical signal input through the optical signal input/output terminal into a first internal electrical signal and to convert a second internal electrical signal into a second optical signal; and a controller configured to provide a first data signal to the memory chip in response to a first external electrical signal input through the electrical signal input/output terminal or the first internal electrical signal and to transfer the second internal electrical signal to the optical signal processor or to output a second external electrical signal to the electrical signal input/output terminal in response to a second data signal output from the memory chip.
    Type: Application
    Filed: October 8, 2012
    Publication date: January 31, 2013
    Inventor: Gwang-Man Lim
  • Publication number: 20120217656
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Application
    Filed: May 7, 2012
    Publication date: August 30, 2012
    Inventors: Chul Park, Hysong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Publication number: 20120206955
    Abstract: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.
    Type: Application
    Filed: April 23, 2012
    Publication date: August 16, 2012
    Inventor: Gwang-Man LIM
  • Patent number: 8193626
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: June 5, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Park, Hysong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Patent number: 8174861
    Abstract: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man Lim
  • Publication number: 20110141790
    Abstract: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.
    Type: Application
    Filed: February 25, 2011
    Publication date: June 16, 2011
    Inventor: Gwang-Man LIM
  • Patent number: 7916512
    Abstract: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to the controller, and an optical generator converting an internal output signal received from the controller into an external output signal. The optical detector converts an external input optical signal into an internal input signal to transmit the converted signal to the controller. The optical generator converts an internal output signal received from the controller into an external output optical signal.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: March 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man Lim
  • Publication number: 20100302829
    Abstract: A semiconductor module and a data memory module having the same are provided. The semiconductor module includes a substrate having a semiconductor device, a ground terminal, a protection pattern, and a switching element. The ground terminal and the protection pattern are formed on the substrate. The switching element connects the ground terminal and the protection pattern in series. The switching element electrically connects the protection pattern and the ground terminal when a voltage applied to the substrate is beyond a set voltage range.
    Type: Application
    Filed: May 10, 2010
    Publication date: December 2, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Gwang-Man LIM
  • Publication number: 20100164088
    Abstract: A package may include a lower unit package and an upper unit package. Each of the unit packages may include a circuit substrate having a lower surface and an upper surface. Wire bonding pads may be provided of the lower surface of the circuit substrate, and chip bonding pads may be provided on the upper surface of the circuit substrate. An IC chip may be provided on the lower surface of the circuit substrate. The IC chip may have an active surface with wire lands and bump lands. Chip bumps may be provided on the bump land. The wire bonding pads of the circuit substrate may be connected to the wire lands of the IC chip using bonding wires. The chip bumps of the upper unit package may be connected to the chip bonding pads of the lower unit package. An IC chip may include a substrate. A conductive layer may be provided on the substrate. The conductive layer may define a bump land for supporting a chip bump and a wire land for connecting to a bonding wire.
    Type: Application
    Filed: March 11, 2010
    Publication date: July 1, 2010
    Inventor: Gwang-Man Lim
  • Publication number: 20100117217
    Abstract: Provided is a semiconductor package including multiple semiconductor chips, and separate groups of leads connected to the semiconductor chips. The leads are exposed to the outside of the semiconductor package. The plurality of leads may include a first lead group for a first chip group and a second lead group for a second chip group. The first and second chip groups are part of the package.
    Type: Application
    Filed: December 3, 2009
    Publication date: May 13, 2010
    Inventors: Chul Park, Hysong-seob Kim, Kun-dae Yeom, Gwang-man Lim
  • Patent number: 7663245
    Abstract: An interposer may include a base substrate supporting an array of conductive lands. The conductive land may have an identical shape and size. The conductive lands may be provided at regular intervals on the base substrate. The conductive land pitch may be determined such that adjacent conductive lands may be electrically connected by one end of an electric connection member. Alternatively, each conductive land may provide respective bonding locations to which ends of two different electric connection members may be bonded. A stacked chip package may include an interposer that may be fabricated by cutting an interposer to size. In the stacked chip package, electrical connections may be made through the interposer between an upper semiconductor chip and a package substrate, between the upper semiconductor chip and a lower semiconductor chip, and/or between the lower semiconductor chip and the package substrate.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: February 16, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gwang-Man Lim
  • Patent number: D727912
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Mok Kang, Ki-Woong Yoo, In-Jae Lee, Gwang-Man Lim, Seok-Jae Han