Patents by Inventor Gyu-hwan Kwag

Gyu-hwan Kwag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7776226
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a clean room by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: August 17, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Sang Kim, Gyu-Chan Jeoung, Gyu-hwan Kwag
  • Publication number: 20090291558
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a clean room by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Application
    Filed: July 30, 2009
    Publication date: November 26, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-sang KIM, Gyu-chan JEOUNG, Gyu-hwan KWAG
  • Publication number: 20090203211
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a clean room by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 13, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-sang KIM, Gyu-chan JEOUNG, Gyu-hwan KWAG
  • Publication number: 20060026857
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Application
    Filed: October 11, 2005
    Publication date: February 9, 2006
    Inventors: Ki-sang Kim, Gyu-chan Jeoung, Gyu-hwan Kwag
  • Publication number: 20050236092
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Application
    Filed: June 28, 2005
    Publication date: October 27, 2005
    Inventors: Ki-sang Kim, Gyu-chan Jeoung, Gyu-hwan Kwag
  • Patent number: 6930050
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: August 16, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-sang Kim, Gyu-chan Jeoung, Gyu-hwan Kwag
  • Patent number: 6732750
    Abstract: A semiconductor wafer cleaning apparatus and method uses only one inner bath for chemical solution and de-ionized water cleaning, and includes a marangoni dryer for cleaning and drying semiconductor wafers. The apparatus includes a loading unit loaded with a cassette holding wafers; a moving mechanism for extracting the wafers from the cassette and moving the wafers into a loader; an inner bath for cleaning the wafers with a chemical solution or de-ionized water; a marangoni dryer including a hood, for moving the wafers from the loader into the bath, to be sealed to the bath; and a knife for supporting the wafers loaded into the bath at a lower portion thereof and moving the wafers up and down. Since the marangoni dryer is adhered to the bath during drying, the wafers are not affected by laminar flow or exhaustion and water marks do not occur thereon.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: May 11, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-joon Cho, Seung-kun Lee, Young-hwan Yun, Gyu-hwan Kwag
  • Publication number: 20030073323
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Application
    Filed: November 19, 2002
    Publication date: April 17, 2003
    Inventors: Ki-Sang Kim, Gyu-Chan Jeoung, Gyu-Hwan Kwag
  • Patent number: 6503365
    Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: January 7, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-sang Kim, Gyu-chan Jeoung, Gyu-hwan Kwag
  • Patent number: 6460269
    Abstract: A wafer dryer for drying a wafer includes a chamber and a support adapted to support the wafer in the chamber. A spray nozzle is disposed in the chamber. A source gas supply tank is in fluid communication with the spray nozzle. At least one heater is operable to heat the chamber and the source gas supply tank. A pumping line is in fluid communication with the chamber. Drive means are operable to rotate the chamber and the spray nozzle. A method for drying a wafer using a wafer dryer including a chamber and a revolving spray nozzle includes the steps of: loading the wafer in the chamber; reducing the pressure in the chamber in which the wafer is loaded to a near vacuum state; creating a temperature controlled atmosphere in the pressure-reduced chamber to quicken drying of the wafer; and spraying the source gas on the wafer while rotating the chamber and the revolving spray nozzle in opposite directions in the pressure-reduced temperature controlled atmosphere.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: October 8, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-joon Cho, Gyu-hwan Kwag
  • Patent number: 6436809
    Abstract: A method of manufacturing semiconductor devices is provided for forming a tungsten plug or polysilicon plug and minimizing the step-height of the intermediate insulating layer. An etching composition for this process is also provided as are semiconductor devices manufactured by this process. The method of manufacturing semiconductor devices includes the steps of forming a tungsten film having a certain thickness on an insulating layer and burying contact holes formed in the insulating layer constituting a specific semiconductor structure, and spin-etching the tungsten film using a certain etching composition such that the tungsten film is present only inside the contact holes not existing on the insulating film.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: August 20, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 6402849
    Abstract: A semiconductor device fabrication apparatus is provided for increasing the deposition rate of a film. The apparatus includes a process tube. Process gas injection portions in a slit configuration and waste gas exhaust portions formed as holes are integrated into the interior of the body of the process tube.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: June 11, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Hyun Han, Ki-heum Nam
  • Publication number: 20010050054
    Abstract: A semiconductor device fabrication apparatus is provided for increasing the deposition rate of a film. The apparatus includes a process tube. Process gas injection portions in a slit configuration and waste gas exhaust portions formed as holes are integrated into the interior of the body of the process tube.
    Type: Application
    Filed: February 26, 2001
    Publication date: December 13, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Gyu-Hwan Kwag, Hyun Han, Ki-Heum Nam
  • Publication number: 20010045223
    Abstract: A semiconductor wafer cleaning apparatus and method uses only one inner bath for chemical solution and de-ionized water cleaning, and includes a marangoni dryer for cleaning and drying semiconductor wafers. The apparatus includes a loading unit loaded with a cassette holding wafers; a moving mechanism for extracting the wafers from the cassette and moving the wafers into a loader; an inner bath for cleaning the wafers with a chemical solution or de-ionized water; a marangoni dryer including a hood, for moving the wafers from the loader into the bath, to be sealed to the bath; and a knife for supporting the wafers loaded into the bath at a lower portion thereof and moving the wafers up and down. Since the marangoni dryer is adhered to the bath during drying, the wafers are not affected by laminar flow or exhaustion and water marks do not occur thereon.
    Type: Application
    Filed: April 11, 2001
    Publication date: November 29, 2001
    Inventors: Yong-Joon Cho, Seung-Kun Lee, Young-Hwan Yun, Gyu-Hwan Kwag
  • Publication number: 20010025428
    Abstract: A wafer dryer for drying a wafer includes a chamber and a support adapted to support the wafer in the chamber. A spray nozzle is disposed in the chamber. A source gas supply tank is in fluid communication with the spray nozzle. At least one heater is operable to heat the chamber and the source gas supply tank. A pumping line is in fluid communication with the chamber. Drive means are operable to rotate the chamber and the spray nozzle. A method for drying a wafer using a wafer dryer including a chamber and a revolving spray nozzle includes the steps of: loading the wafer in the chamber; reducing the pressure in the chamber in which the wafer is loaded to a near vacuum state; creating a temperature controlled atmosphere in the pressure-reduced chamber to quicken drying of the wafer; and spraying the source gas on the wafer while rotating the chamber and the revolving spray nozzle in opposite directions in the pressure-reduced temperature controlled atmosphere.
    Type: Application
    Filed: March 6, 2001
    Publication date: October 4, 2001
    Inventors: Yong-joon Cho, Gyu-hwan Kwag
  • Publication number: 20010006246
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Application
    Filed: January 22, 2001
    Publication date: July 5, 2001
    Inventors: Gyu-Hwan Kwag, Se-Jong Ko, Kyung-Seuk Hwang, Jun-Ing Gil, Sang-O Park, Dae-Hoon Kim, Sang-Moon Chon, Ho-Kyoon Chung
  • Patent number: 6235147
    Abstract: There is provided a wet-etching facility for manufacturing semiconductor devices, wherein the etching process is performed for a wafer with its used surface facing downward so that the by-products from the etching process are completely removed from the etching groove of the wafer by gravity, and the impurities on the back side of the wafer are sank down, and are not touched to the used surface of the other wafer thereby producing good quality of wafers.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: May 22, 2001
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Seung-kun Lee, Jae-hyung Jung, Young-hwan Yun, Gyu-hwan Kwag
  • Patent number: 6232228
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: May 15, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Se-jong Ko, Kyung-seuk Hwang, Jun-ing Gil, Sang-o Park, Dae-hoon Kim, Sang-moon Chon, Ho-Kyoon Chung
  • Patent number: 6200414
    Abstract: A circulation system for supplying one or more chemicals, or mixtures thereof, includes a chemical tank containing the chemical. A chemical supply line is connected at one end to the chemical tank, through which the chemical from the chemical tank is supplied to one of a processing section, for performing a specific semiconductor device fabrication process, and a bypass section, for collecting the chemical while the processing section is idle. A supply nozzle, connected to another end of the chemical supply line, is movable between the processing section and the bypass section, such that the supply nozzle is selectively oriented above one of the processing section and the bypass section. A primary chemical re-circulation line connects the processing section and the chemical tank, and a chemical bypass line connects the bypass section and a portion of the primary chemical re-circulation line.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: March 13, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-seuk Hwang, Gyu-hwan Kwag, Young-hwan Yun
  • Patent number: 6197150
    Abstract: An apparatus is provided for wafer treatment during the manufacture of semiconductor devices. The apparatus for wafer treatment includes a shaft, a chuck supported by the shaft for holding a wafer to be treated, a solution nozzle for supplying a treatment solution for wafer treatment onto the wafer, a gas supplier for supplying a gas to the back side of the wafer, and a heater for heating the gas supplied to the back side of the wafer. The use of this apparatus improves the uniformity of a treatment process such as an etching process or a cleaning process by minimizing the temperature changes of the treatment solution supplied onto the wafer mounted on the spin chuck of the apparatus during the wafer treatment process.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: March 6, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyu-hwan Kwag, Kyung-seuk Hwang