Abstract: Embodiments of the invention are generally directed to detection of cable connections for electronic devices. An embodiment of an apparatus includes a port for the connection of a cable, the port being compatible with a first protocol and a second protocol, the port including a connector for the second protocol, the port including multiple pins including a first pin and a second pin. The apparatus further includes a pull-up resistor coupled between the first pin and a voltage source, a pull-down resistor coupled between the second pin and ground, and a voltage detection element coupled with the second pin. The apparatus is to determine that a cable compatible with the first protocol is connected to the port if the voltage detection element detects a voltage above a first threshold.

Abstract: Embodiments of the invention are generally directed to detection of cable connections for electronic devices. An embodiment of an apparatus includes a port for the connection of a cable, the port being compatible with a first protocol and a second protocol, the port including multiple pins including a first pin for a first line and a second pin for a second line. The apparatus further includes a processor to determine a type of source device connected to the cable, where determination of the type of source device includes the apparatus detecting a low signal on the first line and a high signal on the second line, and, upon detecting the low signal on first line and the high signal on the second line, the apparatus initiates a discovery sequence, the discovery sequence including transmitting a signal sequence on the second line and attempting to receive the signal sequence on the second line.

Abstract: A method, apparatus and system for providing pre-authentication and keep-authentication of content protected ports system employing a ratio of one decipher processing engine (e.g., HDCP engine) associated with multiple ports is disclosed is disclosed. In one embodiment, a receiving device is pre-authenticated by a transmitting device, wherein the receiving device to receive a data stream from the transmitting device via a first data path. Further, a first High-Definition Content Protection (HDCP) engine is associated with a first port in the first data path, the first HDCP engine coupled with a second HDCP engine. The second HDCP engine is associated with a plurality of ports in a second data path, each of the plurality of ports associated with a memory pipe having state information relating to each of the plurality of ports, the state information being used to pre-authenticate the receiving device.

Abstract: Embodiments of the invention are generally directed to a low power standby mode control circuit. An embodiment of an apparatus includes a processor, an interface for a connection with a second apparatus, and an operational circuit, wherein the processor is to disable one or more power connections to the operational circuit in a standby mode. The apparatus further includes a standby mode control circuit, the standby control circuit to operate using a standby power source, wherein the standby mode control circuit is to detect a stimulus signal from the second apparatus and in response to the stimulus signal the standby control circuit is to signal the processor, the processor to enable the one or more power connections of the operational circuit.

Abstract: A mechanism for facilitating clock recovery for streaming content over a packetized network is described. A method of embodiments includes receiving an estimated data stream at a first device. The estimated data stream may include estimated data format information relating to a data stream expected to be received at the first device. The method may further include performing, at the first device, clock regeneration of the estimated data stream based on the estimated data format information. The clock regeneration may include performing clock recovery of the estimated data stream.

Abstract: A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver.

Abstract: Embodiments of the invention are generally directed to detection of cable connections for electronic devices. An embodiment of an apparatus includes a port for the connection of a cable, the port being compatible with a first protocol and a second protocol, the port including multiple pins including a first pin for a first line and a second pin for a second line. The apparatus further includes a processor to determine a type of source device connected to the cable, where determination of the type of source device includes the apparatus detecting a low signal on the first line and a high signal on the second line, and, upon detecting the low signal on first line and the high signal on the second line, the apparatus initiates a discovery sequence, the discovery sequence including transmitting a signal sequence on the second line and attempting to receive the signal sequence on the second line.

Abstract: Embodiments of the invention are generally directed to detection of cable connections for electronic devices. An embodiment of an apparatus includes a port for the connection of a cable, the port being compatible with a first protocol and a second protocol, the port including a connector for the second protocol, the port including multiple pins including a first pin and a second pin. The apparatus further includes a pull-up resistor coupled between the first pin and a voltage source, a pull-down resistor coupled between the second pin and ground, and a voltage detection element coupled with the second pin. The apparatus is to determine that a cable compatible with the first protocol is connected to the port if the voltage detection element detects a voltage above a first threshold.

Abstract: A method, apparatus and system are provided for generating and facilitating Mobile High-Definition Multimedia Interface. In one embodiment, an apparatus includes a transmitter configured to merge multiple channels of a high-definition interface into a single channel to generate a mobile high-definition interface, the mobile high-definition interface configured to facilitate carrying of high-definition media content in a mobile device. The apparatus further includes a receiver coupled with the transmitter, the receiver configured to receive the single channel, and to unmerge the single channel into the multiple channels.

Abstract: Embodiments of the invention are generally directed to determination of physical connectivity status of devices based on electrical measurement. An embodiment of a method includes discovering a connection of a first device with a second device, and performing an electrical measurement of the second device by the first device via the connection between the first device and the second device, where performing the electrical measurement includes sensing by the first device of an element of the second device. The method further includes, if the sensing by the first device fails to detect the element of the second device and a predetermined condition for the electrical measurement is enabled, then determining by the first device that the connection with the second device has been lost.

Abstract: A data sampling circuit that employs an oversampling clock to oversample a data signal, a phase tracking circuit for use in such a sampling circuit, and a receiver and system including such a sampling circuit. Preferably, phase tracking is implemented by systematically identifying and rejecting at least one worst sampling position, and sampling the data signal at a non-rejected sampling position. Preferably, phase tracking is accomplished by counting through-transitions of edges of the sampled data signal through each oversampling position, and rejecting an oversampling position having a highest count of through-transitions. In some embodiments, different phase tracking methods (at least one of which includes the step of generating through-transition counts) are used for different types of input data. Other aspects of the invention are methods for determining an oversampling position for oversampling a data signal, and methods for oversampling a data signal including by generating through-transition counts.

Abstract: Discovery of electronic devices utilizing a control bus. An embodiment of a method includes connecting a receiving device to a cable, where the cable includes a control bus. If the receiving device is in a disconnect state and a signal from a transmitting device is detected on the control bus, the device is transferred to a state for a first type of transmitting device. If the receiving device is in either the disconnect state or the state for the first type of transmitting device and a predetermined voltage signal is received from the transmitting device, then the receiving device is transferred to a state for a second type of transmitting device.

Abstract: In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.

Abstract: An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair.

Abstract: A method, apparatus and system for providing pre-authentication and keep-authentication of content protected ports system employing a ratio of one decipher processing engine (e.g., HDCP engine) associated with multiple ports is disclosed is disclosed. In one embodiment, a receiving device is pre-authenticated by a transmitting device, wherein the receiving device to receive a data stream from the transmitting device via a first data path. Further, a first High-Definition Content Protection (HDCP) engine is associated with a first port in the first data path, the first HDCP engine coupled with a second HDCP engine. The second HDCP engine is associated with a plurality of ports in a second data path, each of the plurality of ports associated with a memory pipe having state information relating to each of the plurality of ports, the state information being used to pre-authenticate the receiving device.

Abstract: A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver.

Abstract: Transmission of alternative content over standard device connectors. An embodiment of a method includes connecting a first device to a second device utilizing a standard connector, the connector including multiple pins, and detecting whether the second device is operating in a standard mode or an alternative mode. If the second device is operating in the alternative mode, then switching one or more pins of the standard connector for the alternative mode and transmitting or receiving signals for the alternative mode via the plurality of pins of the standard connector.

Abstract: Methods and apparatuses for using single-ended common mode signaling, additional data can be transferred in backward, forward, and/or both directions over an existing differential pair connection without adding extra wire.

Abstract: In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.

Abstract: A battery powered computing device has a channel configured as a single direct current balanced differential channel. A signal transmitter is connected to the channel. The signal transmitter is configured to apply clock edge modulated signals to the channel, where the clock edge modulated signals include direct current balancing control signals. A signal receiver is connected to the channel. The signal receiver is configured to recover the direct current balancing control signals.