Abstract: A stereo separation circuit includes a pair of amplifiers and a pair of divider circuits. Each of the amplifiers is coupled to receive a stereo signal (e.g., a left stereo signal or a right stereo signal) and the output of the other amplifier through a portion of one of the divider circuits. The other portion of the divider circuit is coupled as feedback across an amplifier. A ratio between the feedback portion of the divider circuit and the other portion of the divider circuit provides a separation ratio. The greater the separation ratio, the greater the perceived audio separation of the stereo signals.

Abstract: A method and apparatus for encoding data into amplitude and pulse encoded signals begins by partially encoding a set of bits that are contained within a data stream into a pulse modulated signal. The encoding continues by amplitude modulating the pulse modulated signal to produce the amplitude and pulse encoded signal. The partial encoding of the set of bits may be done by pulse position encoding or pulse pattern encoding. Alternatively, or in addition, the amplitude of the pulse pattern may be adjusted to control the DC average of such signals.

Abstract: A method and apparatus for pulse position modulation begins when a digital data stream is received. The encoding process continues by obtaining a set of bits from the digital data stream and modulating the set of bits into a pulse having a pulse width. Next, a transition edge of the pulse is positioned at one of a plurality of time intervals within a time chip based on the set of bits, wherein the pulse width is greater than each of the plurality of time intervals.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a full, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.

Abstract: A method and apparatus for detecting data is accomplished by an enhanced adaptive threshold which is coupled to receive a data signal and a first reference value. The enhanced adaptive threshold, based on the inputs, provides a threshold to a mixing circuit which, in turn, mixes the threshold with the data signal. The output of the mixer is then subsequently compared with a reference signal to provide an indication of the data signal and preserving its pulse width. The threshold produced by the adaptive threshold circuit is a fixed value when the relationship between the data signal and the first value is in the first state (i.e., the data signal is less than the first value) and the threshold is a proportional threshold when the data signal and the first value are in a second relationship (i.e., the data signal is greater than the first value).

Abstract: A method and apparatus for encoding data into a pulse pattern begins by encoding header data based on a first pulse encoding convention to produce a header pulse pattern. The resulting header pulse pattern occupies multiple time chips and indicates that subsequent pulse pattern signals are valid. After generating the header pulse pattern, a set of bits of a stream of data is encoded based on a second pulse encoding convention to produce a data pulse pattern. The data pulse pattern occupies at least one time chip. The first and second encoding conventions are used to ensure that the header data and data are encoded in distinguishing manners such that both can be accurately decoded. Such conventions include using a predetermined pulse pattern to represent the header data, which is only used for the header data.

Abstract: A method and apparatus for transceiving data over a wireless communication path with minimal effects from cross-talk is accomplished by a receiving circuit, a transmission circuit, and an interference cancellation circuit. The receiving circuit includes an amplifier and a scaling circuit which operate upon input data signals to produce a scaled representation thereof having high pulse with fidelity. The amplifier circuit and scaling circuit each include adjustable circuitry which are configured based on the magnitude of the received data signals. The interference cancellation circuit provides a signal to the amplifier circuit and scaling circuit to bias the respective adjustable circuitry to an initial operating level when the transmission circuit is transmitting data and/or upon completion of such transmissions.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a fill, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a full, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.

Abstract: A method and apparatus for pulse position demodulation begins by receiving a pulse that is positioned approximately at one of a plurality of time intervals within a time chip, where the pulse has a pulse width that is greater than each of the plurality of time intervals. The decoding process then continues by determining the time interval in which a transition edge of the pulse lies. From the particular time interval, a set of bits is determined.

Abstract: A method and apparatus for detecting pulse data is accomplished by a low voltage data detection circuit that includes a preamplifier circuit, an amplification stage, and a scaling circuit. The preamplifier circuit has a differential input, a predefined gain, and a maximum output limit and receives an input signal, which has a wide dynamic range. The preamplifier circuit amplifies the input signal based on the predefined gain to produce a preamplified data signal. The preamplified data signal is again amplified by the amplification stage and subsequently provided to the scaling circuit which scales the amplified data signal to a predetermined level. The resulting scaled data signal maintains the pulse width fidelity of the input data signal.

Abstract: A pre-amplifier circuit, which may be used in a variety of data recovery circuits to accurately recover data transmissions, includes an input regulatory circuit, a feedback circuit, and an amplifier. The input regulatory circuit regulates the magnitude of the data signal provided to the amplifier based on feedback signals from a feedback circuit. For low level data signals, the input regulatory circuit provides a full, or almost full, representation of the data signal to the amplifier for amplification. But, when the data signal levels increase, the input regulatory circuit attenuates, based on the feedback signals, the data signals more and more before providing them to the amplifier, such that the output of the amplifier stays within a certain range.

Abstract: A method and apparatus for converting a digital signal into an analog signal with minimal self generated noise is achieved by a digital to analog converter that includes a current source, a switch circuit, and a gating circuit. The current source provides a current, which is representative of digital data, to the switch circuit. The switch circuit, based on control signals provided by the gating circuit, routes the current to an analog node and/or a reference potential node. The control signals cause the switch circuit to route the current to both nodes when a clock pulse signal is in a first state regardless of the state of the data, to route the current to the analog node when the clock pulse signal is in a second state and digital data is in a second state, and to route the current to the reference potential node when the clock pulse signal is in the second state and the digital data is in a first state. In this manner, an analog representation of the digital data is present at the analog node.

Abstract: A transimpedance amplifier (10, 50) is provided for processing a current signal received from a circuit device (12, 52). The circuit device (12, 52) can be a photodiode used to receive infrared transmissions. The transimpedance amplifier (10, 50) includes a first stage (14, 54) coupled to an input node. The first stage (14, 54) has a first amplifier (20, 60) operable to drive the input node and is operable to provide a current signal to a second node (NODE 3, NODE 2) in response to a current signal in the input node. A second stage (16, 56) is connected to the second node (NODE 3, NODE 2). The second stage (16, 56) has a second amplifier (32, 68) and is operable to convert the current signal in the second node (NODE 3, NODE 2) into an output voltage signal (V.sub.OUT) at an output node. A feedback loop (18, 58) can be connected to receive the output voltage signal (V.sub.OUT) and to provide a feedback current signal to cancel ambient noise in the current signal in the input node.

Abstract: A bandpass sigma-delta analog-to-digital converter (ADC) (10) includes first (11) and second (12) bandpass sigma-delta modulators, and a digital filter (13) connected to digital outputs thereof. In the illustrated embodiment, the first bandpass sigma-delta modulator (11) is a second-order, single bit bandpass modulator, and the second bandpass sigma-delta modulator (12) is a first-order, multiple-bit modulator. Coefficients in feedback paths of the first (11) and second (12) modulators are derived from a transfer function of the digital filter. In one embodiment, a receiver (50) for a system such as frequency modulation (FM) radio converts an intermediate frequency (IF) analog signal to digital in-phase (I) and quaternary (Q) signals using the bandpass sigma-delta ADC (10).

Abstract: A linear attenuator (23) for applications such as front/rear audio fading receives an input current to be programmably attenuated according to an input code at an input node (29). A transistor (30) is connected between the input node (29) and inputs of current-steering cells (40, 50, 60), which pass portions of the input current to either an output node (32) or a second node in response to the input code. An amplifier (22) has a negative input terminal connected to the input node (29), a positive input terminal receiving a reference voltage, and an output terminal connected to a control electrode of the transistor (30). The operational amplifier (22) and the transistor (30) together regulate the voltage at the input node (29) to prevent distortion of the input current by making the input node (29) a virtual ground node. Thus the attenuator (23) avoids nonlinearities normally associated with transistors and the need to duplicate a digital-to-analog converter (DAC) (21) providing the input current.

Abstract: A filter (62) receives an input current signal and provides a filtered output signal in response. The filter (62) presents an extremely low-impedance input node (72) to the source of the input current signal, such as a current digital-to-analog converter (DAC) (62), thus avoiding modulating the input current signal. The filter (62) includes a virtual ground circuit (70) connected to the input node (72) followed by a filter (80) such as a biquad filter. The virtual ground circuit (70) has a high-gain cascoded loop to provide an intermediate current at a high-impedance output terminal (82), which is connected to an input terminal of the filter (80). The virtual ground circuit (70) is implemented without operational amplifiers and resistors, thus providing high linearity without a large amount of integrated circuit area.

Abstract: A multi-bit sigma-delta analog-to-digital converter (ADC) (40) includes a sigma-delta modulator (41) with a multi-bit quantizer (46) and a digital-to-analog converter (DAC) (47). An output of the DAC (47) provides an error signal of the modulator (41). The quantizer (46) provides a quantized signal having multiple bits ordered from a most-significant bit, to a second most significant bit, to at least one lower-order bit including a least-significant bit. At least two of these bits, including the most significant bit and one of the lower-order bit or bits, are provided as inputs to the DAC (47). The remaining bits are provided as inputs to a prefilter (49), which performs the same transfer function as a comparable multi-bit modulator. A summing device (49) subtracts the output of the prefilter (48) from the quantized signal. A decimation filter (50) resamples the output of the summing device (49) to provide the output of the ADC (40).

Abstract: A digital-to-analog converter (10) uses series-connected resistors (55-59) to implement conversion of most significant bits of a digital input signal to an equivalent analog output signal. Current sources (22-26) are used to implement conversion of least significant bits of the digital input signal to the analog output signal. After making a binary-to-thermometer code conversion of the least significant bits, first logic circuitry (70) provides control signals (SI) for controlling the switching of each of the current sources to either a first (42) or a second (44) node. After making a binary to `one of` code conversion of the most significant bits, second logic circuitry (86) provides control signals (SR) for respectively switching the first and second nodes to any two resistor nodes of the resistors. The resistors are connected between a reference voltage terminal and a third node where the analog output signal is developed.

Abstract: A tuning circuit (10) and method of operation for tuning an analog filter (40). The tuning circuit (10) has an integrator with an input portion (12) and a comparator portion (14), a counter (32), and a decoder (34). The integrator is implemented with an RC time constant which is proportional to an RC time constant of the analog filter (40). The comparator portion (14) provides an enable signal during the RC time constant of the integrator to the counter (16) which quantizes the RC time constant relative to a clock period of the counter (16). A predetermined decoding is performed to provide an output control signal to control adjustment of the RC time constant of the analog filter (40).