Abstract: A gate driver includes a carry signal generating circuit and a shift register circuit. The carry signal generating circuit receives a vertical start signal and outputs first and second carry signals. The shift register circuit receives the first and second carry signals and outputs a first stage first carry signal, a first stage second carry signal and a first stage gate output signal. The carry signal generating circuit includes a first carry generator generating the first carry signal and a second carry generator generating the second carry signal. The shift register circuit includes a first stage first carry generator generating the first stage first carry signal, a first stage second carry generator generating the first stage second carry signal and a first stage output buffer outputting the first stage gate output signal.

Abstract: An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.

Abstract: A scan driver and a driving method thereof, in which the scan driver includes a plurality of stages outputting an output signal in response to clock signals supplied at a first frequency during a driving time of one frame, wherein the plurality of stages are supplied with the clock signals at a second frequency lower than the first frequency during a hold time of the one frame that is separate from the driving time of the one frame.

Abstract: A scan driver includes stages that include a first stage. A method for operating the scan driver includes providing a first clock signal, a first carry clock signal, a second carry clock signal, a first power source voltage, and a second power source voltage to the first stage to enable the first stage to provide a first scan signal to a first scan line. Throughout a portion of one frame, each of the first clock signal, the first carry clock signal, and the second carry clock signal is constant.

Abstract: A display panel includes an electrostatic protection circuit including a first protection circuit electrically connected between a first signal line and a second signal line. The first protection circuit includes a first transistor connected between the first signal line and the second signal line and including a gate electrode and a lower gate electrode, a first resistor connected between the gate electrode of the first transistor and the second signal line, a first capacitor connected between the gate electrode of the first transistor and the second signal line, and a second capacitor connected between the lower gate electrode of the first transistor and the second signal line. The lower gate electrode of the first transistor receives a reference voltage.

Abstract: A display panel includes pads and pixels, signal lines electrically connected to the pads, and a protection circuit electrically connected between one signal line among the signal lines and a first voltage line. The protection circuit includes a first transistor, a first resistor, and a first capacitor. The first transistor includes a first electrode electrically connected to the first voltage line, a second electrode electrically connected to the one signal line, and a gate electrode. The first resistor is electrically connected between the gate electrode of the first transistor and the one signal line. The first capacitor is disposed between the gate electrode of the first transistor and the one signal line.

Abstract: A display device includes scan lines, pixels electrically connected to the scan lines, and a scan driver including stages for supplying scan signals through the scan lines to the pixels. The stages include a stage that includes the following elements: a first node setting unit for setting a voltage of a first node; a second node setting unit for setting a voltage of a second node based on the voltage of the first node; a third node setting unit for setting a voltage of a third node based on the voltage of the second node; and an output unit for outputting a scan signal based on the voltage of the third node. Each of the first and third node setting units includes an N-type transistor. The scan driver further includes a first charge pump for supplying a first bias voltage to a back-gate electrode of the N-type transistor.

Abstract: A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.

Abstract: A scan driver is disclosed that includes a plurality of stages for supplying scan signals to scan lines. A first stage among the stages includes: a first sub-stage circuit for generating a first scan signal, based on an input signal, a first clock signal, a second clock signal, a first power source, and a second power source; and a first charge pump circuit for supplying a bias voltage to the first sub-stage circuit, based on a third power source.

Abstract: A display device includes a power supply to supply a first initialization power source to the pixels through a first initialization and to supply a second initialization power source to the pixels through a second power line.

Abstract: A gate driver includes stages connected to clock signal lines to which clock signals are applied and a first gate power line to which a first gate power voltage is applied, and outputting the first gate power voltage as gate signals in response to the clock signals. The clock signals have a first frequency and the first gate power voltage has a first voltage level in a first period. The clock signals have a second frequency lower than the first frequency and the first gate power voltage has a second voltage level in a second period. One of the first and second voltage levels is a gate-on voltage level that turns on a transistor, and another of the first and second voltage levels is a gate-off voltage level that turns off the transistor.

Abstract: A light emitting display device includes: a light emitting diode at a display area, and including an anode and a cathode; a pixel circuit at the display area, and to transmit an output current to the anode of the light emitting diode; a repair line extending in a first direction; a repair pixel circuit connected to the repair line; a bridge including one end overlapping with the repair line; and a connecting portion connected to the anode, and including one end overlapping with the bridge. The bridge is not connected to the repair line, the connecting portion, and the anode.

Abstract: A gate driver includes first and second stages. Each of the first and second stages includes an output circuit which outputs a scan signal, a carry signal and an inverted carry signal based on voltages of first and second nodes, a first input terminal, a second input terminal, a third input terminal, a first output terminal, and a second output terminal. The first stage further includes a first input circuit which controls the voltages of the first and second nodes thereof based on a start pulse and a signal supplied to the second input terminal. The second stage further includes a second input circuit which controls the voltages of the first and second nodes thereof based on a first carry signal and a first inverted carry signal, and a signal supplied to the second input terminal. The second stage is dependently connected to the first stage.

Abstract: A scan driver and a driving method thereof, in which the scan driver includes a plurality of stages outputting an output signal in response to clock signals supplied at a first frequency during a driving time of one frame, wherein the plurality of stages are supplied with the clock signals at a second frequency lower than the first frequency during a hold time of the one frame that is separate from the driving time of the one frame.

Abstract: A display panel includes pads and pixels, signal lines electrically connected to the pads, and a protection circuit electrically connected between one signal line among the signal lines and a first voltage line. The protection circuit includes a first transistor, a first resistor, and a first capacitor. The first transistor includes a first electrode electrically connected to the first voltage line, a second electrode electrically connected to the one signal line, and a gate electrode. The first resistor is electrically connected between the gate electrode of the first transistor and the one signal line. The first capacitor is disposed between the gate electrode of the first transistor and the one signal line.

Abstract: An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

Abstract: A display device includes gate lines and pixels connected to the gate lines. The display device includes stages which provide gate signals to the gate lines, and first and second gate power lines which transfer a first voltage to the stages. A first stage among the stages includes a first node controller and a first output unit. The first node controller is connected to the second gate power line, and controls a voltage of a first control node. The first output unit is connected to the first gate power line, and outputs a first voltage of the first gate power line as a gate signal in response to a voltage of the first control node.

Abstract: A gate driver includes stages connected to clock signal lines to which clock signals are applied and a first gate power line to which a first gate power voltage is applied, and outputting the first gate power voltage as gate signals in response to the clock signals. The clock signals have a first frequency and the first gate power voltage has a first voltage level in a first period. The clock signals have a second frequency lower than the first frequency and the first gate power voltage has a second voltage level in a second period. One of the first and second voltage levels is a gate-on voltage level that turns on a transistor, and another of the first and second voltage levels is a gate-off voltage level that turns off the transistor.

Abstract: A display device includes a display unit, a degradation compensator and a data driver. The display unit includes first and second pixels disposed in first and second regions, respectively. The degradation compensator generates a first compensated grayscale value by compensating a first grayscale value for the first pixel based on a first degradation curve and generates a second compensated grayscale value by compensating a second grayscale value for the second pixel based on a second degradation curve, where the first and second degradation curves define luminance reduction rates according to accumulated usage time of the first and second pixels, respectively. A data driver generates first and second data signals based on the first and second compensated grayscale values, respectively, and supplies the first and second data signals to the first and second pixels, respectively. A transmittance of the second region is greater than a transmittance of the first region.

Abstract: An organic light emitting display device includes pixels, a sensor configured to extract at least one of deviation information of first transistors of the pixels and deterioration information of OLEDs of the pixels in a sensing period, and a converter configured to change a bit of first data input from the outside by using at least one of the deviation information and the deterioration information, and to generate second data, wherein a pixel at an ith horizontal line includes an OLED, a first transistor configured to control an amount of a current that flows from a first power source via the OLED in response to a voltage of a first node, second and third transistors configured to turn on when a scan signal is supplied to an ith scan line, and a fourth transistor configured to turn on when a control signal is supplied to an ith control line.