Abstract: A display panel of an organic light emitting diode (OLED) display device having a display region includes a plurality of first pixels located at an upper half of the display region, a plurality of second pixels located at a lower half of the display region, a plurality of first data lines extending in a first direction, and coupled to the plurality of first pixels, a plurality of second data lines extending in the first direction, disposed alternately with the plurality of first data lines along a second direction crossing the first direction, and coupled to the plurality of second pixels, and a demultiplexing circuit configured to selectively couple a plurality of data channels of a data driver of the OLED display device to the plurality of first data lines or the plurality of second data lines.

Abstract: A display device may include first pixels disposed in a display area and including respective first driving transistors. A second pixel is disposed in a non-display area and includes a second driving transistor. A sensor is configured to sense a current of the second pixel during a sensing period and generate sensing data. A degradation compensator is configured to convert first image data into second image data. A data driver is configured to generate data signals based on the second image data and supply the data signals to the first pixels. The degradation compensator calculates an age of the first pixels based on accumulating the second image data, converts the first image data into the second image data by deriving a compensation value from representative compensation data according to the age of the first pixels, and calibrates the representative compensation data based on the sensing data.

Abstract: A display panel includes a pixel connected to a scan line and a data line, and a lighting test circuit which provides a lighting test voltage to the pixel through the data line. The lighting test circuit includes a first test transistor including a first electrode which receives the lighting test voltage, a second electrode and a gate electrode which receives a first test control signal, and a second test transistor including a first electrode connected to the second electrode of the first test transistor, a second electrode connected to the data line and a gate electrode which receives a second test control signal.

Abstract: A repair pixel and a display apparatus including the repair pixel, the display panel including a repair pixel for a pixel row or a plurality of repair pixels for a pixel row so that repair may be performed using the repair pixel when a bad pixel occurs in the corresponding pixel row. The bad pixel is repaired using the repair pixel so that the yield of the display panel may be enhanced.

Abstract: A display apparatus includes: a display panel; a driving circuit which provides a driving signal to the display panel and includes at least one driving transistor; and a clock signal wiring for providing a clock signal to the driving circuit. The driving circuit includes an active pattern, a gate pattern, a source pattern, and a shielding pattern, the gate pattern overlaps the active pattern in a plan view, a major surface plane of the source pattern is disposed in a layer different from a layer the active pattern is disposed in, the source pattern is electrically connected to the active pattern, the shielding pattern is disposed between the gate pattern and the clock signal wiring and applied with a constant voltage, and the clock signal wiring overlaps the gate pattern in the plan view and is disposed on the source pattern.

Abstract: An emission driver includes a plurality of stages. A stage of the plurality of stages receives a start signal, a first clock signal, a second clock signal, a protection signal, a first gate power voltage and a second gate power voltage and outputs an emission signal. The stage of the plurality of stages includes a pull-up switching element connected between a first gate power voltage terminal which receives the first gate power voltage and an emission signal output terminal which outputs the emission signal, a pull-down switching element connected between a second gate power voltage terminal which receives the second gate power voltage and the emission signal output terminal and a protection switching element which applies the first gate power voltage to a control electrode of the pull-down switching element in response to the protection signal.

Abstract: A display device includes gate lines and pixels connected to the gate lines. The display device includes stages which provide gate signals to the gate lines, and first and second gate power lines which transfer a first voltage to the stages. A first stage among the stages includes a first node controller and a first output unit. The first node controller is connected to the second gate power line, and controls a voltage of a first control node. The first output unit is connected to the first gate power line, and outputs a first voltage of the first gate power line as a gate signal in response to a voltage of the first control node.

Abstract: A display device includes a display panel including gate lines and pixels connected to the gate lines, and a gate driver including plural stages providing gate signals to the gate lines. A first stage among the stages includes a node controller including an input terminal and configured to control a voltage of a first control node and a voltage of a second control node, and an output unit connected to a first gate power source line and configured to output a first gate power source voltage of the first gate power source line as a gate signal through an output terminal in response to the voltage of the first control node. The node controller includes a first auxiliary transistor connected in the form of a diode between the input terminal and the second control node and a boosting capacitor connected between the second control node and the output terminal.

Abstract: A display device includes pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver to supply a scan signal to each of the first scan lines at a first frequency to drive the display device at a first driving frequency, and to supply the scan signal to each of the first scan lines at a second frequency to drive the display device at a second driving frequency lower than the first driving frequency; a second scan driver to supply a scan signal to each of the second scan lines at the first frequency to drive the display device at the first driving frequency, and to supply the scan signal to each of the second scan lines at the second frequency to drive the display device at the second driving frequency; an emission driver to supply an emission control signal to each of the emission control lines at the first frequency; and a data driver to supply a data signal to each of the data lines in response to the scan signal supplied to each of the first scan lines

Abstract: A display device includes a display panel, an input sensing unit, input sensing pads, a shift register, and a multiplexer circuit. The display panel includes a display area and a non-display area. The input sensing unit is disposed on the display panel. The input sensing unit includes sensing electrodes and signal lines respectively connected to the sensing electrodes. The input sensing pads are disposed in the non-display area. The input sensing pads include control signal pads and a sensing pad. The shift register array is configured to receive a start signal and at least one clock signal through some of the control signal pads, and to sequentially activate first selection signals. The multiplexer circuit is configured to selectively connect the signal lines to the sensing pad in response to the first selection signals.

Abstract: A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.

Abstract: A display device includes a display panel including gate lines and pixels connected to the gate lines, and a gate driver including plural stages providing gate signals to the gate lines. A first stage among the stages includes a node controller including an input terminal and configured to control a voltage of a first control node and a voltage of a second control node, and an output unit connected to a first gate power source line and configured to output a first gate power source voltage of the first gate power source line as a gate signal through an output terminal in response to the voltage of the first control node. The node controller includes a first auxiliary transistor connected in the form of a diode between the input terminal and the second control node and a boosting capacitor connected between the second control node and the output terminal.

Abstract: A display device includes: a first pixel connected to a first data line and a first scan line; a second pixel connected to the first data line and a second scan line; a first scan driver connected to a first scan start line and the first scan line; and a second scan driver connected to a second scan start line and the second scan line. In a first frame period, the second scan start line is to be suppled with a second scan start signal having a turn-on level, after a first period elapses after a first scan start signal having a turn-on level is supplied to the first scan start line. In a second frame period, a difference between a time at which the first scan start signal having the turn-on level is supplied and a time at which the second scan start signal having the turn-on level is supplied corresponds to a second period. The second period is shorter than the first period.

Abstract: A display device includes pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver to supply a scan signal to each of the first scan lines at a first frequency to drive the display device at a first driving frequency, and to supply the scan signal to each of the first scan lines at a second frequency to drive the display device at a second driving frequency lower than the first driving frequency; a second scan driver to supply a scan signal to each of the second scan lines at the first frequency to drive the display device at the first driving frequency, and to supply the scan signal to each of the second scan lines at the second frequency to drive the display device at the second driving frequency; an emission driver to supply an emission control signal to each of the emission control lines at the first frequency; and a data driver to supply a data signal to each of the data lines in response to the scan signal supplied to each of the first scan lines

Abstract: A display device including a pixel connected to a first scan line, a second scan line, a third scan line, an emission control line, and a data line; a first driver supplying a first scan signal to the first scan line in a first period; a second driver supplying a second scan signal to the second scan line in the first period; a third driver supplying a third scan signal to the third scan line in the first and second periods; an emission driver supplying a control signal to the emission control line in the first and second periods; and a data driver supplying a data signal to the data line in the first period, in which a width of the second scan signal is greater than that of the first scan signal to overlap a plural first scan signals respectively supplied to first scan lines during the first period.

Abstract: A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.

Abstract: A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.

Abstract: A gate driver includes first and second stages. Each of the first and second stages includes an output circuit which outputs a scan signal, a carry signal and an inverted carry signal based on voltages of first and second nodes, a first input terminal, a second input terminal, a third input terminal, a first output terminal, and a second output terminal. The first stage further includes a first input circuit which controls the voltages of the first and second nodes thereof based on a start pulse and a signal supplied to the second input terminal. The second stage further includes a second input circuit which controls the voltages of the first and second nodes thereof based on a first carry signal and a first inverted carry signal, and a signal supplied to the second input terminal. The second stage is dependently connected to the first stage.

Abstract: A display device includes: a first pixel connected to a first data line and a first scan line; a second pixel connected to the first data line and a second scan line; a first scan driver connected to a first scan start line and the first scan line; and a second scan driver connected to a second scan start line and the second scan line. In a first frame period, the second scan start line is to be suppled with a second scan start signal having a turn-on level, after a first period elapses after a first scan start signal having a turn-on level is supplied to the first scan start line. In a second frame period, a difference between a time at which the first scan start signal having the turn-on level is supplied and a time at which the second scan start signal having the turn-on level is supplied corresponds to a second period. The second period is shorter than the first period.

Abstract: A scan driver and a driving method thereof, in which the scan driver includes a plurality of stages outputting a gate signal in response to clock signals supplied at a first frequency during a driving time of one frame, wherein the plurality of stages are supplied with the clock signals at a second frequency lower than the first frequency during a hold time of the one frame that is separate from the driving time of the one frame.