Abstract: A display includes: a display panel, scan and data drivers, an ADC, a controller, and a data switch. In a first initialization period, the data switch connects data lines to the data driver, which applies an initialization voltage thereto. In a first sensing period, the data switch connects the data lines to the ADC. The ADC receives analog sensing signals corresponding to first voltages of the data lines, and converts the analog sensing signals into digital sensing signals output to the controller. In a second initialization period, the data switch connects the data lines to the data driver, which applies the initialization voltage thereto. In a second sensing period, voltages at the data lines change to second voltages, the data switch connects the ADC to the data lines, and the ADC converts analog sensing signals corresponding to the second voltages into digital sensing signals output to the controller.

Abstract: A sensing driving circuit and a display device including the same are disclosed. In one aspect, the sensing driving circuit includes a plurality of stages configured to respectively output a plurality of sensing signals and including a (K)th stage and a (K+1)th stage. The (K)th stage includes a shift register configured to provide a (K)th carry signal to the (K+1)th stage; and a masking buffer configured to output a (K)th sensing signal. The masking buffer includes a first input circuit configured to provide i) an input signal to a first node based on a node driving signal and ii) a first power voltage to a second node based on the input signal and the node driving signal. The masking buffer also includes a node masking circuit configured to supply the first power voltage to the first node based on a masking signal.

Abstract: An organic light emitting display includes: a display panel including pixels at crossing regions of data lines and scan lines; a scan driver configured to divide one frame into a plurality of sub-fields, to divide each of the subfields into p (p is a positive integer of 2 or more) periods, and to supply scan signals to the scan lines; and a data driver configured to supply data voltages to the data lines concurrently with supply of respective scan signals, wherein a gray scale voltage from among (P+1) gray scale voltages is supplied as at least one of the data voltages.

Abstract: A thin film transistor includes a substrate, a semiconductor layer on the substrate, a first insulating layer covering the substrate and the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the semiconductor layer, a second insulating layer covering the first gate electrode and the first insulating layer, a second gate electrode on the second insulating layer and overlapping the semiconductor layer and the first gate electrode, a third insulating layer covering the second gate electrode, a first contact hole defined in the first insulating layer, the second insulating layer and the third insulating layer, and through which a portion of the semiconductor layer is exposed, and a source electrode and a drain electrode connected to the semiconductor layer through the first contact hole.

Abstract: A scanline driver includes a shift register circuit and an output buffer. The shift register circuit provides a register output signal and a plurality of signals based on a scan input signal and a plurality of clock signals. The shift register circuit is arranged at at least one horizontal side of a pixel circuit region and includes a plurality of unit pixel circuits connected to a scanline. The output buffer provides a scanline enable signal to the scanline based on the register output signal and the plurality of signals. The output buffer is arranged at at least one vertical side of the pixel circuit region in a pixel array.

Abstract: A flexible display device according to example embodiments includes a rollable display panel, a housing accommodating the rollable display panel in a rolled state and including an opening portion through which the rollable display panel is pulled out, an optical sensor disposed at the opening portion and configured to detect luminance of the rollable display panel while the rollable display panel is rolled or unrolled, a controller configured to compensate image data based on detection data generated by the optical sensor, and a display panel driver configured to control a display of rollable display panel.

Abstract: A pixel includes a driving circuit, a first organic light emitting diode, a second organic light emitting diode, and a self-repair circuit. The driving circuit supplies current based on a data signal supplied through a data line. The first organic light emitting diode is coupled to the driving circuit through a first current path. The second OLED is coupled to the driving circuit through a second current path. The self-repair circuit interrupts the first current path and supplies the current to the second current path when the first organic light emitting diode has a defect.

Abstract: A pixel of an organic light emitting display includes first through fourth transistors and a capacitor. The first transistor operates based on a scan signal and is connected between a data line and a first node. The capacitor is connected between the first node and a second node. The second transistor operates based on a gate signal and is connected between a first power voltage and a third node. The third transistor operates based on compensation control line signal and is connected between the second node and the third node. The fourth transistor operates based on sensing control line signal and is connected between the data line and the third node. The organic light emitting element is connected between the third node and a second power voltage.

Abstract: A gate driving circuit including a plurality of stages to respectively output a plurality of scan signals, an N-th stage of the stages includes: a shift register to output an N-th scan signal based on an (N?1)-th scan signal; and a sensing signal output block connected to the shift register and to output an (N?1)-th sensing signal for compensation of a pixel based on a sensing control signal and a data control signal, where N is an integer greater than 1.

Abstract: A display panel includes a pad electrically connected to an external device, a data line electrically connected to the pad, a pixel at a crossing region of the data line, a feedback line, and a scan line, and a transferring circuit block configured to provide an initialization voltage to the feedback line in response to an initialization control signal, and configured to electrically connect the feedback line with the data line in response to a first sensing control signal.

Abstract: A display device includes a display panel, a data driver, a scan driver, and a power supply. The display panel includes power voltage lines and pixels coupled to data lines and scan lines. The data driver supplies data voltages to the data lines. The scan driver provides scan signals to the scan lines. The power supply supplies a power voltage to the power voltage lines. The display panel includes a compensation resistance coupled between s pixels and one of the power voltage lines.

Abstract: A scanline driver and a display device including the same are disclosed. In one aspect, the scanline driver includes a driving circuit configured to provide a first driving signal to a first driving node and a second driving signal to a second driving node based on a scan input signal and a plurality of clock signals. The driving circuit includes a plurality of driving transistors and a plurality of reset transistors. The scanline driver also includes a buffer circuit configured to generate a scan output signal based on the first and second driving signals. The buffer circuit includes a plurality of buffer transistors. Each of the driving transistors and the buffer transistors includes a floating gate transistor which includes a floating gate configured to transfer a voltage corresponding to a second logic low level lower than a first logic low level.

Abstract: A scan line driver is disclosed. In one aspect, the scan line driver includes a driving signal generation circuit, an output line driving circuit, and a carry transfer circuit. The driving signal generation circuit is configured to generate first and second driving signals based on a plurality of clock signals and a carry signal from a previous scan line driver. The output line driving circuit is configured to generate a scan line enable signal based on the first and second driving signals. The carry transfer circuit is configured to generate a carry signal based on the first and second driving signals.

Abstract: A pixel circuit and an electroluminescent display including the same are disclosed. In one aspect, the pixel circuit includes a scan transistor connected between a data line and a first node and having a gate electrode configured to receive a scan signal, a driving transistor connected between a first power supply voltage and a third node and having a gate electrode connected to a second node, an emission control transistor connected between the third node and a fourth node and having a gate electrode configured to receive an emission control signal, a light-emitting diode connected between the fourth node and a second power supply voltage less than the first power supply voltage, and a compensation circuit initializes the second node to an initial voltage during a first compensation period and electrically connects the second node to the third node during a second compensation period following the first compensation period.

Abstract: A pixel includes an organic light emitting diode (OLED) having a cathode electrode coupled to a second power supply, a pixel circuit configured to control an amount of current supplied to the OLED to correspond to a previous data signal, and a driver configured to store a present data signal supplied from a data line and to supply the previous data signal to the pixel circuit. The OLED, pixel circuit, and driver may be controlled by signals in a frame that includes first through fourth periods, the second power supply may be set to a first voltage in the first and second periods and to a second voltage in the third and fourth periods, and the first voltage may be a voltage at which the OLED does not emit light and the second voltage may be a voltage at which the OLED emits light.

Abstract: An organic light emitting display device includes pixels, a sensor configured to extract at least one of deviation information of first transistors of the pixels and deterioration information of OLEDs of the pixels in a sensing period, and a converter configured to change a bit of first data input from the outside by using at least one of the deviation information and the deterioration information, and to generate second data, wherein a pixel at an ith horizontal line includes an OLED, a first transistor configured to control an amount of a current that flows from a first power source via the OLED in response to a voltage of a first node, second and third transistors configured to turn on when a scan signal is supplied to an ith scan line, and a fourth transistor configured to turn on when a control signal is supplied to an ith control line.

Abstract: A pixel includes an organic light emitting diode, a first driver and a second driver. The second driver controls an amount of current supplied from a first power source to the organic light emitting diode, corresponding to a previous data signal. The first driver stores a current data signal supplied from a data line and supplies the previous data signal to the second driver. In the pixel, the second driver includes a sixth transistor coupled between an initialization power source and a first node coupled to a gate electrode of a first transistor, the sixth transistor being configured to turn on when a first control signal is supplied; and a seventh transistor coupled between the first power source and a second node commonly coupled to the first and second drivers, the seventh transistor being configured to turn on when the first control signal is supplied.

Abstract: A display device includes a display panel including a first pixel, a second pixel, and a third pixel, a scan driver configure to provide a scan signal to the first through the third pixels, a data driver which provides a data signal to the first through the third pixels, a reference voltage generator which provides a first reference voltage that compensates a degradation of a first driving transistor, a second reference voltage that compensates a degradation of a second driving transistor, and a third reference voltage that compensates a degradation of a third driving transistor, and a timing controller which generates a control signal that controls the scan driver, the data driver, and the reference voltage generator.

Abstract: A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a storage unit, a second transistor and a third transistor. The first transistor controls the amount of current flowing from a first power source coupled to a second power source via a second node and the organic light emitting diode in response to a voltage at a first node. The storage unit is connected to a data line, and stores a data signal from the data line. The second transistor is connected to a fourth node and the first node and is turned on when a second control signal is supplied. The third transistor is connected to the first node and a third node and is turned on when a third control signal is supplied.

Abstract: There is provided a gate driver including a plurality of gate sub-drivers electrically connected to a plurality of gate lines, wherein an (n)th gate sub-driver, of the gate sub-drivers includes a shift register configured to receive an (n-1)th carry signal from an (n-1)th gate sub-driver of the gate sub-drivers adjacent to the (n)th gate sub-driver, to synchronize the (n-1)th carry signal with a first clock signal, and to output an (n)th carry signal based on the synchronized (n-1)th carry signal, and a mask configured to output a gate signal based on the synchronized (n-1)th carry signal and a mask signal, wherein n is an integer greater than or equal to 2.