Patents by Inventor Haifeng Zhou

Haifeng Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180174924
    Abstract: One aspect of the present disclosure is a method of fabricating metal gate by forming special layers in place of traditional TiN hard mask over the ILD0 layer to avoid ILD0 losses due to conventional ILD0 CMP. The method can comprise: after the ILD0 CMP, forming a first thin ashable film layer over the ILD0 layer; then forming a second thin dielectric layer over the first layer; during the aluminum CMP process for a first region (PMOS or NMOS), removing the second layer through polishing until the top surface of the first ashable film layer; and then removing first ashable film layer through an ashing method such as burning. In this way, ILD0 loss can be reduced during the first aluminum CMP step and thus can reduce initial height of ILD0, which in turn can reduce the height of initial dummy gate filled in the cavity.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 21, 2018
    Applicant: Shanghai Huali Microelectronics Corporation
    Inventors: Tong Lei, Yongyue Chen, Haifeng Zhou
  • Publication number: 20180175157
    Abstract: The present disclosure addresses and solves the current problem of oxygen accumulation in IL after an HKMG stack is formed. A fabrication method is provided for fabricating high-k/metal gate semiconductor device by forming at least one Titanium (Ti) layer between multiple HK layers. A high-k/metal gate semiconductor device including at least one TiO2 layer between multiple HK layers is also provided.
    Type: Application
    Filed: February 10, 2017
    Publication date: June 21, 2018
    Applicant: Shanghai Huali Microelectronics Corporation
    Inventors: Yingming Liu, Yu Bao, Haifeng Zhou, Jingxun Fang
  • Publication number: 20180145890
    Abstract: A service registration method and usage method, and a related apparatus are used to reduce risks generated when a service of an AP-type service providing node cannot be registered and a CP-type service providing node provides a service since distributed characteristics of a service providing node are not distinguished in a network partition scenario. The method is: obtaining, by a registration service node, network partition information, and receiving a registration request of a service providing node, where the registration request carries a distributed characteristic of the service providing node, and the distributed characteristic meets both consistency and partition tolerance, or meets both availability and partition tolerance; and determining, by the registration service node according to the network partition information and the distributed characteristic of the service providing node, whether registration of a service provided by the service providing node is allowed.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 24, 2018
    Inventors: Haifeng ZHOU, Long Li, Jianqing Yuan
  • Patent number: 9891461
    Abstract: The present invention provides a display panel, a manufacturing method thereof, and a display device. The display panel comprises a base substrate, an opposite substrate, a first electrode, a second electrode, and a plurality of original sub-pixels on at least part of which conversion sub-pixels are provided, and an upper water layer is provided on each of the conversion sub-pixels. The conversion sub-pixel is configured to, when an electric field is generated between the first and second electrodes, shrink to one side of the original sub-pixel so that the upper water layer covers the original sub-pixel from above, and, when no electric field is generated between the first and second electrodes, cover the original sub-pixel located under the conversion sub-pixel from above.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: February 13, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Haifeng Zhou, Zhuo Zhang, Xuelan Wang
  • Patent number: 9847784
    Abstract: Transistors can be used for a variety of electronic-based applications. Therefore, transistor efficiency and performance is of importance. An apparatus is presented herein to increase the locking range of transistors by leveraging cross-coupled injection transistors in conjunction with symmetry injection transistors. The transistor efficiency can also be increase by reducing a parasitic capacitance associated with the components of the transistor.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: December 19, 2017
    Assignee: CITY UNIVERSITY OF HONG KONG
    Inventors: Quan Xue, Haifeng Zhou, Kam Man Shum
  • Patent number: 9772553
    Abstract: The present invention relates to a modified epoxy acrylate and a method for producing the same, a photoresist composition and a method for producing the same, and a transparent photoresist formed from the photoresist composition. The modified epoxy acrylate is an epoxy acrylate modified with phosphate monomer which has a structure represented by Formula I wherein, n is an integer selected from 1˜21, R is a short-chain carboxylic acid ester group having the structural formula ?in which p is a bivalent saturated or unsaturated carbon chain having 1˜10 carbon atoms, and the carbon chain is optionally substituted by alkyl, alkenyl, hydroxy, nitro or halogen. Since the phosphate can react with the multi-valence metal in substrates so as to connect the polymer onto the substrates firmly through covalent bonds, therefore the adhesion force is improved significantly and the protective function of the tranparent photoresist is improved accordingly.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: September 26, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuelan Wang, Haifeng Zhou
  • Patent number: 9724612
    Abstract: An integrated user profile is provided to PC/console gamers who also participate in other online gaming community activities such as web sites that provide online gamer forums. Provided to the users is the ability to view, access, and/or contribute to their console gamer profile using the other online gaming community activities such as participation in web sites. Also, an identity and profile first created on the web site is that which will be used and stored in game play using the PC/console and online live gaming service.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: August 8, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: J. Clinton Paul Fowler, Haifeng Zhou, Harris D. Thurmond, Walter Reed Rector
  • Publication number: 20170149438
    Abstract: Transistors can be used for a variety of electronic-based applications. Therefore, transistor efficiency and performance is of importance. An apparatus is presented herein to increase the locking range of transistors by leveraging cross-coupled injection transistors in conjunction with symmetry injection transistors. The transistor efficiency can also be increase by reducing a parasitic capacitance associated with the components of the transistor.
    Type: Application
    Filed: February 6, 2017
    Publication date: May 25, 2017
    Inventors: Quan Xue, Haifeng Zhou, Kam Man Shum
  • Patent number: 9595607
    Abstract: Transistors can be used for a variety of electronic-based applications. Therefore, transistor efficiency and performance is of importance. An apparatus is presented herein to increase the locking range of transistors by leveraging cross-coupled injection transistors in conjunction with symmetry injection transistors. The transistor efficiency can also be increase by reducing a parasitic capacitance associated with the components of the transistor.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: March 14, 2017
    Assignee: CITY UNIVERSITY OF HONG KONG
    Inventors: Quan Xue, Haifeng Zhou, Kam Man Shum
  • Publication number: 20170062583
    Abstract: Semiconductor devices including semiconductor junctions and semiconductor field effect transistors that exploit the straining of semiconductor materials to improve device performance are provided. Also described are methods for making semiconductor structures. Dislocation defect-free epitaxial grown structures that are embedded into a semiconductor base are provided. The epitaxial structures can extend beyond the surface of the semiconductor base and terminate at a faceted structure. The epitaxial structures are formed using a multilayer growth process that provides for continuous transitions between adjacent layers.
    Type: Application
    Filed: October 8, 2015
    Publication date: March 2, 2017
    Inventors: Runling Li, Haifeng Zhou
  • Patent number: 9583620
    Abstract: The present invention is directed to semiconductor processes and devices. More specifically, embodiments of the present invention provide a semiconductor device that comprises a diamond-shaped cavity, and the shaped cavity is filled with silicon and germanium material. There are other embodiments as well.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: February 28, 2017
    Assignee: SHANGHAI HUALI MICROELECTRONICS CORPORATION
    Inventors: Haifeng Zhou, Jun Tan
  • Patent number: 9570582
    Abstract: A method of removing a dummy gate dielectric layer is provided. Firstly a first plasma containing F is utilized to remove the dummy dielectric layer which contains Si and O. Then a second plasma containing H2 is utilized to remove fluorine compound on the surface of the semiconductor substrate. Since the fluorine residue formed after the first plasma treatment reacts with the second plasma to form a gaseous product HF, the fluorine element can be taken away from the semiconductor device with the HF, which prevents inversion layer offset and gate current leakage occurred in the subsequent processing steps due to the fluorine element.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: February 14, 2017
    Assignee: SHANGHAI HUALI MICROELECTRONICS CORPORATION
    Inventors: Yu Bao, Xiaoqiang Zhou, Jun Zhou, Bin Zhong, Haifeng Zhou
  • Publication number: 20170033211
    Abstract: Transistors can be used for a variety of electronic-based applications. Therefore, transistor efficiency and performance is of importance. An apparatus is presented herein to increase the locking range of transistors by leveraging cross-coupled injection transistors in conjunction with symmetry injection transistors. The transistor efficiency can also be increase by reducing a parasitic capacitance associated with the components of the transistor.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 2, 2017
    Inventors: Quan Xue, Haifeng Zhou, Kam Man Shum
  • Publication number: 20160308051
    Abstract: The present invention is directed to semiconductor processes and devices. More specifically, embodiments of the present invention provide a semiconductor device that comprises a modified diamond-shaped cavity, and the shaped cavity is filled with silicon and germanium material. There are other embodiments as well.
    Type: Application
    Filed: May 8, 2015
    Publication date: October 20, 2016
    Inventors: Haifeng Zhou, Jun Tan
  • Publication number: 20160308050
    Abstract: The present invention is directed to semiconductor processes and devices. More specifically, embodiments of the present invention provide a semiconductor device that comprises a diamond-shaped cavity, and the shaped cavity is filled with silicon and germanium material. There are other embodiments as well.
    Type: Application
    Filed: May 8, 2015
    Publication date: October 20, 2016
    Inventors: Haifeng Zhou, Jun Tan
  • Publication number: 20160225678
    Abstract: Techniques for measuring and testing a semiconductor wafer during semiconductor device fabrication include designating a test area on the top surface of the wafer and etching a first rectangular trench and a second rectangular trench on the top surface of the wafer in the test area. The trenches are oriented such that a length of the first trench is perpendicular to a length of the second trench, and positioned such that the length of the first trench, if extended, intersects the length of the second trench. A silicon-germanium compound is deposited into the first trench and the second trench, and a test pad is removed from the test area of the wafer. The test pad includes a side surface where both the first trench and the second trench are exposed. The side surface of the test pad is scanned with a transmission electron microscope to take measurements of the silicon-germanium.
    Type: Application
    Filed: April 20, 2015
    Publication date: August 4, 2016
    Inventors: Haifeng Zhou, Jun Tan
  • Patent number: 9331147
    Abstract: The invention discloses a treatment process for a semiconductor, comprising providing a substrate; defining a trench opening region of the substrate; performing plasma etching to form a trench region at the trench opening region; subjecting the substrate to a first epitaxial process with a first plurality of gaseous species to form a protective layer overlaying at least the first sidewall and the bottom of the trench region; and subjecting the substrate and the protective layer to a second epitaxial process with a second plurality of gaseous species to form a filling material overlaying the protective layer and being positioned at least partially within the trench region. The invention further provides a semiconductor processing technique used to eliminate or reduce dislocation defect on the semiconductor device and improve device performance.
    Type: Grant
    Filed: May 24, 2015
    Date of Patent: May 3, 2016
    Assignee: SHANGHAI HUALI MICROELECTRONICS CORPORATION
    Inventors: Haifeng Zhou, Jun Tan
  • Publication number: 20150378254
    Abstract: The present invention relates to a modified epoxy acrylate and a method for producing the same, a photoresist composition and a method for producing the same, and a transparent photoresist formed from the photoresist composition. The modified epoxy acrylate is an epoxy acrylate modified with phosphate monomer which has a structure represented by Formula I wherein, n is an integer selected from 1˜21, R is a short-chain carboxylic acid ester group having the structural formula in which p is a bivalent saturated or unsaturated carbon chain having 1˜10 carbon atoms, and the carbon chain is optionally substituted by alkyl, alkenyl, hydroxy, nitro or halogen. Since the phosphate can react with the multi-valence metal in substrates so as to connect the polymer onto the substrates firmly through covalent bonds, therefore the adhesion force is improved significantly and the protective function of the tranparent photoresist is improved accordingly.
    Type: Application
    Filed: January 27, 2015
    Publication date: December 31, 2015
    Inventors: Xuelan WANG, Haifeng ZHOU
  • Publication number: 20150378239
    Abstract: The present invention provides a display panel, a manufacturing method thereof, and a display device. The display panel comprises a base substrate, an opposite substrate, a first electrode, a second electrode, and a plurality of original sub-pixels on at least part of which conversion sub-pixels are provided, and an upper water layer is provided on each of the conversion sub-pixels. The conversion sub-pixel is configured to, when an electric field is generated between the first and second electrodes, shrink to one side of the original sub-pixel so that the upper water layer covers the original sub-pixel from above, and, when no electric field is generated between the first and second electrodes, cover the original sub-pixel located under the conversion sub-pixel from above.
    Type: Application
    Filed: November 28, 2014
    Publication date: December 31, 2015
    Inventors: Haifeng ZHOU, Zhuo ZHANG, Xuelan WANG
  • Patent number: 9136672
    Abstract: An optical light source is provided. The optical light source includes a waveguide including two reflectors arranged spaced apart from each other to define an optical cavity therebetween, an optical gain medium, and a coupling structure arranged to couple light between the optical cavity and the optical gain medium.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: September 15, 2015
    Assignee: Agency for Science, Technology and Research
    Inventors: Xianshu Luo, Junfeng Song, Haifeng Zhou, Tsung-Yang Liow, Mingbin Yu, Patrick Guo-Qiang Lo