Patents by Inventor Hajime Nagano

Hajime Nagano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230096446
    Abstract: A terminal insertion device includes a chuck gripping a terminal, a housing holder holding a housing, an imaging unit to capture an image of the housing, a driving mechanism and a control unit. The control unit measures a distance from a reference point of a field of view of the imaging unit to a positioning target portion in the field of view based on an image obtained, measures a movement amount of a gripping point of the chuck when a measurement pin gripped by the chuck is aligned with the positioning target portion, calculates a reference distance between the gripping point and the reference point based on the distance and the movement amount, captures an image to identify a position of a cavity of the housing, drives the driving mechanism based on the calculated reference distance, and aligns and inserts the terminal into the identified cavity.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 30, 2023
    Applicant: YAZAKI CORPORATION
    Inventors: Hajime NAGANO, Kazuhiko TAKADA, Katsuya YAMAZAKI
  • Publication number: 20230097349
    Abstract: A terminal insertion method includes a reference position setting process of capturing an image of a subject for reference position measurement gripped by the chuck and setting a reference position based on a captured image, a posture correction process of capturing an image of the terminal gripped by the chuck, obtaining an inclination of the terminal for a specific part of the terminal in the captured image, and correcting a posture of the terminal, a terminal position calculation process of capturing again the image of the terminal whose posture is corrected and calculating a position of the terminal based on the captured image, and an insertion process of correcting the position of the terminal using a difference between a calculated measurement position of the terminal and the reference position as a correction value and inserting the terminal into the cavity of the housing.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 30, 2023
    Applicant: YAZAKI CORPORATION
    Inventors: Hajime NAGANO, Kazuhiko TAKADA
  • Publication number: 20230098980
    Abstract: A terminal insertion device inserts a terminal connected to an electric wire into a cavity of a housing. The terminal insertion device includes a rear chuck portion to grip the electric wire, a front chuck portion to grip the electric wire at a position closer to the terminal than is the rear chuck portion, the front chuck portion being movable toward and away from the rear chuck portion along an extending direction of the electric wire, a driving mechanism to advance and retreat the rear chuck portion and the front chuck portion relative to the housing, and a control part to control the rear chuck portion, the front chuck portion, and the drive mechanism. The control unit causes the terminal insertion device to execute an electric wire gripping operation, a sliding operation, an insertion operation, a switching operation and a reinsertion operation.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 30, 2023
    Applicant: YAZAKI CORPORATION
    Inventors: Hajime NAGANO, Kazuhiko TAKADA, Mamoru ARAKI
  • Patent number: 10839988
    Abstract: A wire harness manufacturing system includes an assembly line that manufactures a wire harness and one or a plurality of supply devices that prepares to supply component magazines in which components of the wire harness are loaded in a holder to the assembly line. Each of the supply devices is capable of preparing a plurality of the component magazines which are different according to types of the components. The component magazines are capable of delivering from the supply devices to at least a part of the series of assembly steps in a state of being independent of both the assembly line and the supply device.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: November 17, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Kazuhiko Takada, Takuya Taniguchi, Hajime Nagano
  • Patent number: 10669621
    Abstract: According to the embodiment, a vaporization system includes a vaporizer, a body, a sensor, a moving mechanism, and a supplier. The vaporizer includes a plurality of containers which can store powdered solid materials. The body in a vacuum state can house the vaporizer. The sensor detects a residue of the solid materials stored in a plurality of the containers respectively. The moving mechanism, on the basis of a detection result of the sensor, moves the plurality of the containers respectively between a first position located inside the vaporizer, and a second position located outside of the vaporizer. A supplier supplies the solid material to the container located in the second position among the plurality of the containers.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: June 2, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Fumiki Aiso, Hajime Nagano, Kensei Takahashi, Tomohisa Iino
  • Patent number: 10438966
    Abstract: According to one embodiment, the silicon layer includes phosphorus. The buried layer is provided on the silicon layer. The stacked body is provided on the buried layer. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body extends in a stacking direction of the stacked body through the stacked body and through the buried layer, and includes a sidewall portion positioned at a side of the buried layer. The silicon film is provided between the buried layer and the sidewall portion of the semiconductor body. The silicon film includes silicon as a major component and further includes at least one of germanium or carbon.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: October 8, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Tomonari Shioda, Junya Fujita, Tatsuro Nishimoto, Yoshiaki Fukuzumi, Atsushi Fukumoto, Hajime Nagano
  • Publication number: 20190067317
    Abstract: According to one embodiment, the silicon layer includes phosphorus. The buried layer is provided on the silicon layer. The stacked body is provided on the buried layer. The stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body extends in a stacking direction of the stacked body through the stacked body and through the buried layer, and includes a sidewall portion positioned at a side of the buried layer. The silicon film is provided between the buried layer and the sidewall portion of the semiconductor body. The silicon film includes silicon as a major component and further includes at least one of germanium or carbon.
    Type: Application
    Filed: March 7, 2018
    Publication date: February 28, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Tomonari SHIODA, Junya FUJITA, Tatsuro NISHIMOTO, Yoshiaki FUKUZUMI, Atsushi FUKUMOTO, Hajime NAGANO
  • Publication number: 20190066880
    Abstract: A wire harness manufacturing system includes an assembly line that manufactures a wire harness and one or a plurality of supply devices that prepares to supply component magazines in which components of the wire harness are loaded in a holder to the assembly line. Each of the supply devices is capable of preparing a plurality of the component magazines which are different according to types of the components. The component magazines are capable of delivering from the supply devices to at least a part of the series of assembly steps in a state of being independent of both the assembly line and the supply device.
    Type: Application
    Filed: October 29, 2018
    Publication date: February 28, 2019
    Inventors: Kazuhiko Takada, Takuya Taniguchi, Hajime Nagano
  • Patent number: 10186521
    Abstract: According to one embodiment, a semiconductor device includes a foundation layer, a stacked body provided on the foundation layer, the stacked body including a plurality of electrode layers stacked with an insulator interposed, a semiconductor body extending through the stacked body in a stacking direction of the stacked body, and a charge storage portion provided between the semiconductor body and the electrode layers. The semiconductor body includes a first semiconductor film, and a second semiconductor film provided between the first semiconductor film and the charge storage portion. An average grain size of a crystal of the second semiconductor film is larger than an average grain size of a crystal of the first semiconductor film.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: January 22, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Atsushi Fukumoto, Fumiki Aiso, Hajime Nagano, Takuo Ohashi
  • Patent number: 10036091
    Abstract: According to some embodiments, a semiconductor manufacturing apparatus includes a first boat and a second boat, each of the first boat and the second boat having two support rings respectively provided at a top end and a bottom end thereof and a plurality of pillars provided between the top support ring and bottom support ring and spaced apart from one another. The pillar is provided with support protrusions on which a semiconductor substrate can be placed, and vertical positions of upper surfaces of the support protrusions of the second boat are lower than positions of upper surfaces of the support protrusions of the first boat. The semiconductor apparatus is configured to lift the second boat such that the positions of the upper surfaces of the support protrusions provided in the second boat are positioned above the positions of the upper surfaces of the support protrusions provided in the first boat.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: July 31, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Hajime Nagano
  • Publication number: 20180105936
    Abstract: According to some embodiments, a semiconductor manufacturing apparatus includes a first boat and a second boat, each of the first boat and the second boat having two support rings respectively provided at a top end and a bottom end thereof and a plurality of pillars provided between the top support ring and bottom support ring and spaced apart from one another. The pillar is provided with support protrusions on which a semiconductor substrate can be placed, and vertical positions of upper surfaces of the support protrusions of the second boat are lower than positions of upper surfaces of the support protrusions of the first boat. The semiconductor apparatus is configured to lift the second boat such that the positions of the upper surfaces of the support protrusions provided in the second boat are positioned above the positions of the upper surfaces of the support protrusions provided in the first boat.
    Type: Application
    Filed: July 20, 2017
    Publication date: April 19, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Hajime NAGANO
  • Publication number: 20180083028
    Abstract: According to one embodiment, a semiconductor device includes a foundation layer, a stacked body provided on the foundation layer, the stacked body including a plurality of electrode layers stacked with an insulator interposed, a semiconductor body extending through the stacked body in a stacking direction of the stacked body, and a charge storage portion provided between the semiconductor body and the electrode layers. The semiconductor body includes a first semiconductor film, and a second semiconductor film provided between the first semiconductor film and the charge storage portion. An average grain size of a crystal of the second semiconductor film is larger than an average grain size of a crystal of the first semiconductor film.
    Type: Application
    Filed: March 15, 2017
    Publication date: March 22, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Atsushi FUKUMOTO, Fumiki AISO, Hajime NAGANO, Takuo OHASHI
  • Patent number: 9920425
    Abstract: A semiconductor manufacturing apparatus according to an embodiment includes a chamber that is capable of accommodating therein a plurality of semiconductor substrates. A gas supply part supplies process gas to the chamber. A top exhaust port is connected to a top portion of the chamber and exhausts gas within the chamber. A bottom exhaust port is connected to a bottom portion of the chamber and exhausts gas within the chamber. A controller controls a timing of supplying process gas from the gas supply part and a timing of switching between exhaust from the top exhaust port and exhaust from the bottom exhaust port.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: March 20, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki Matsui, Hajime Nagano
  • Patent number: 9920427
    Abstract: A semiconductor manufacturing apparatus according to an embodiment comprises a reaction chamber in which a semiconductor substrate is capable of being accommodated when a deposited film is to be formed on a surface of the semiconductor substrate. A first supplier supplies a source gas to a first area in the reaction chamber. A second supplier supplies an oxidation gas to a second area in the reaction chamber. A third supplier supplies a hydrogen gas to a third area between the first area and the second area in the reaction chamber. A stage moves the semiconductor substrate to any one of the first to third areas.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: March 20, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Motoki Fujii, Fumiki Aiso, Hajime Nagano, Ryota Fujitsuka
  • Publication number: 20180057926
    Abstract: According to the embodiment, a vaporization system includes a vaporizer, a body, a sensor, a moving mechanism, and a supplier. The vaporizer includes a plurality of containers which can store powdered solid materials. The body in a vacuum state can house the vaporizer. The sensor detects a residue of the solid materials stored in a plurality of the containers respectively. The moving mechanism, on the basis of a detection result of the sensor, moves the plurality of the containers respectively between a first position located inside the vaporizer, and a second position located outside of the vaporizer. A supplier supplies the solid material to the container located in the second position among the plurality of the containers.
    Type: Application
    Filed: February 13, 2017
    Publication date: March 1, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Fumiki AISO, Hajime NAGANO, Kensei TAKAHASHI, Tomohisa llNO
  • Publication number: 20170229473
    Abstract: According to an embodiment, a semiconductor memory device includes first and second stacked bodies, first and second memory parts, and an insulating part. The first stacked body includes first conductive layers and first insulating layers alternately arranged in a first direction. The second stacked body includes second conductive layers and second insulating layers alternately arranged in the first direction. The first and second memory parts extend through the first and second stacked body in the first direction, respectively. The insulating part is provided between the first and second stacked bodies. The insulating part includes a first oxygen-containing film including silicon and oxygen, and a nitrogen-containing film including silicon and nitrogen. The first oxygen-containing film is provided between at least one of first conductive layers and the nitrogen-containing film. The first oxygen-containing film has a hole.
    Type: Application
    Filed: July 8, 2016
    Publication date: August 10, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Atsushi FUKUMOTO, Fumiki AISO, Hajime NAGANO
  • Patent number: 9728552
    Abstract: According to an embodiment, a semiconductor memory device includes first and second stacked bodies, first and second memory parts, and an insulating part. The first stacked body includes first conductive layers and first insulating layers alternately arranged in a first direction. The second stacked body includes second conductive layers and second insulating layers alternately arranged in the first direction. The first and second memory parts extend through the first and second stacked body in the first direction, respectively. The insulating part is provided between the first and second stacked bodies. The insulating part includes a first oxygen-containing film including silicon and oxygen, and a nitrogen-containing film including silicon and nitrogen. The first oxygen-containing film is provided between at least one of first conductive layers and the nitrogen-containing film. The first oxygen-containing film has a hole.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: August 8, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Fukumoto, Fumiki Aiso, Hajime Nagano
  • Patent number: 9558936
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes an accommodation module configured to accommodate a substrate. The apparatus further includes a first flow channel including first openings configured to emit a first gas into the accommodation module. The apparatus further includes a second flow channel including second openings configured to emit the first gas into the accommodation module, a number or a size of the second openings being different from a number or a size of the first openings. The apparatus further includes a controller configured to control supplying of the first gas to the first and second flow channels such that the first gas is emitted from the first openings at a first flow velocity and the first gas is emitted from the second openings at a second flow velocity different from the first flow velocity.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: January 31, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hajime Nagano
  • Patent number: 9478416
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a belt supporting module including a first portion that is provided around a first axis, a second portion that is provided around a second axis different from the first axis, a third portion connecting the first and second portions, and a fourth portion connecting the first and second portions and positioned below the third portion. The apparatus further includes a belt provided on the belt supporting module, and configured to rotate around the first axis in a first direction and rotate around the second axis in a second direction reverse to the first direction. The apparatus further includes a wafer supporting module provided on the belt and configured to support a wafer. The apparatus further includes raw material feeding heads provided above the belt and configured to feed a raw material of a film to be formed on the wafer.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: October 25, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Fukumoto, Fumiki Aiso, Takeshi Shundo, Hajime Nagano
  • Publication number: 20160284533
    Abstract: In one embodiment, a semiconductor manufacturing apparatus includes an accommodation module configured to accommodate a substrate. The apparatus further includes a first flow channel including first openings configured to emit a first gas into the accommodation module. The apparatus further includes a second flow channel including second openings configured to emit the first gas into the accommodation module, a number or a size of the second openings being different from a number or a size of the first openings. The apparatus further includes a controller configured to control supplying of the first gas to the first and second flow channels such that the first gas is emitted from the first openings at a first flow velocity and the first gas is emitted from the second openings at a second flow velocity different from the first flow velocity.
    Type: Application
    Filed: August 21, 2015
    Publication date: September 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Hajime NAGANO