Patents by Inventor Hajime Nago

Hajime Nago has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128325
    Abstract: According to one embodiment, a semiconductor structure includes a substrate including silicon crystal, a first layer including AlN crystal, and an intermediate region provided between the silicon crystal and the AlN crystal. The intermediate region includes Al and nitrogen. A direction from the silicon crystal to the AlN crystal is along a first direction. A third lattice plane spacing in the first direction of a lattice of Al atoms in the intermediate region is longer than a first lattice plane spacing in the first direction of the silicon crystal and longer than a second lattice plane spacing in the first direction of the AlN crystal.
    Type: Application
    Filed: July 19, 2023
    Publication date: April 18, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hajime NAGO, Hisashi YOSHIDA, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Patent number: 11955520
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternatively a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 9, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hajime Nago, Jumpei Tajima, Shinya Nunoue
  • Publication number: 20240096969
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternately a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20230317796
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N, a second nitride region including Alx2Ga1-x2N, and a third nitride region including Alx3Ga1-x3N. The second nitride region is provided between the first and third nitride regions in a first direction from the first nitride region to the second nitride region. The second nitride region includes carbon and oxygen. The first nitride region does not include carbon, or a second carbon concentration in the second nitride region is higher than a first carbon concentration in the first nitride region. The second carbon concentration is higher than a third carbon concentration in the third nitride region. A ratio of a second oxygen concentration in the second nitride region to the second carbon concentration is not less than 1.0 × 10-4 and not more than 1.4 × 10-3.
    Type: Application
    Filed: August 5, 2022
    Publication date: October 5, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Hisashi YOSHIDA, Jumpei TAJIMA
  • Publication number: 20230290857
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-×1N (0 < x1 ? 1), a second nitride region including Alx2Ga1-x2N (0 ? x2 < 1), and an intermediate region being between the first nitride region and the second nitride region. In a first direction from the first nitride region to the second nitride region, an oxygen concentration in the nitride member has a peak value at a first position included in the intermediate region. The peak value is 4.9 times or more a first oxygen concentration in the first nitride region. A second carbon concentration in the second nitride region is higher than a first carbon concentration in the first nitride region.
    Type: Application
    Filed: August 10, 2022
    Publication date: September 14, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Hisashi YOSHIDA, Jumpei TAJIMA
  • Patent number: 11757006
    Abstract: A method for manufacturing a semiconductor device is provided, the method including forming an intermediate region including Alx3Ga1-x3N (0<x3?1 and x2<x3) on a first semiconductor layer including Alx1Ga1-x1N (0?x1<1); and forming a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2) on the intermediate region, a first gas being used to form the intermediate region in the forming of the intermediate region, the first gas including a gas including Al, a gas including ammonia, and a gas including hydrogen, and a second gas being used to form the second semiconductor layer in the forming of the second semiconductor layer, the second gas including a gas including Al, a gas including In, a gas including ammonia, and a gas including nitrogen.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: September 12, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime Nago, Jumpei Tajima, Toshiki Hikosaka
  • Publication number: 20230197444
    Abstract: According to one embodiment, a wafer includes a silicon substrate including a first surface, and a nitride semiconductor layer provided on the first surface. The silicon substrate includes a plurality of first regions that can be distinguished from each other in an X-ray image of the wafer. The first regions are separated from an outer edge region of the silicon substrate. One of the first regions includes a plurality of first linear bodies along a first line direction. An other one of the first regions includes a plurality of second linear bodies along a second line direction. The second line direction crosses the first line direction.
    Type: Application
    Filed: August 10, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Jumpei TAJIMA, Hajime NAGO, Toshiki HIKOSAKA, Shinya NUNOUE
  • Publication number: 20230138962
    Abstract: According to one embodiment, a nitride semiconductor includes a base body including boron, a first nitride region including Alx1Ga1-x1N (0.98<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). A concentration of boron in the base body is not less than 1×1019 cm?3. The first nitride region is between the base body and the second nitride region. The first nitride region includes a first surface facing the base body and a second surface facing the second nitride region. A second concentration of boron in the second surface is not more than 1/8000 of a first concentration of boron in the first surface.
    Type: Application
    Filed: August 1, 2022
    Publication date: May 4, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Publication number: 20230049717
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, and a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the base body and the second nitride region. The first nitride region includes a first portion and a second portion. The second portion is between the first portion and the second nitride region. An oxygen concentration in the first portion is higher than an oxygen concentration in the second portion. The oxygen concentration in the second portion is not more than 1×1018/cm3. A first thickness of the first portion in a first direction from the first to second nitride regions is thinner than a second thickness of the second portion in the first direction.
    Type: Application
    Filed: February 1, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20230046560
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, a nitride member, and an intermediate region provided between the base body and the nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the intermediate region and the second nitride region. The intermediate region includes nitrogen and carbon. A concentration of carbon in the intermediate region is not less than 1.5×1019/cm3 and not more than 6×1020/cm3.
    Type: Application
    Filed: February 10, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20220367644
    Abstract: A method for manufacturing a semiconductor device is provided, the method including forming an intermediate region including Alx3Ga1-x3N (0<x3?1 and x2<x3) on a first semiconductor layer including Alx1Ga1-x1N (0?x1<1); and forming a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2) on the intermediate region, a first gas being used to form the intermediate region in the forming of the intermediate region, the first gas including a gas including Al, a gas including ammonia, and a gas including hydrogen, and a second gas being used to form the second semiconductor layer in the forming of the second semiconductor layer, the second gas including a gas including Al, a gas including In, a gas including ammonia, and a gas including nitrogen.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Patent number: 11469304
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer including Alx1Ga1-x1N (0?x1<1), a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2), and an intermediate region provided between the first and second semiconductor layers. The intermediate region includes Alx3Ga1-x3N (0<x3?1 and x2<x3). The second semiconductor layer includes first and second surfaces. The second surface is between the intermediate region and the first surface in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The second semiconductor layer includes a plurality of first pits provided in the first surface. Widths of the first pits are 200 nm or more. A density in the first surface of the first pits is not less than 5×107/cm2 and not more than 1×108/cm2.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: October 11, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime Nago, Jumpei Tajima, Toshiki Hikosaka
  • Publication number: 20220283199
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member including a first nitride region, a second nitride region, and a third nitride region. The second nitride region is between the first nitride region and the third nitride region in a first direction. A HAADF-STEM (High Angle Annular Dark-Field Scanning Transmission Electron Microscopy) image of the nitride member includes a plurality of bright points and a dark area between the bright points. The dark area is darker than the bright points. A third brightness of the dark area in a third image region corresponding to the third nitride region is lower than a first brightness of the dark area in a first image region corresponding to the first nitride region. A second brightness of the dark area in a second image region corresponding to the second nitride region is lower than the third brightness.
    Type: Application
    Filed: August 12, 2021
    Publication date: September 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Publication number: 20220190119
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternately a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Application
    Filed: July 8, 2021
    Publication date: June 16, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20210310118
    Abstract: Provided is a vapor phase growth method according to an embodiment including loading a first substrate into a reaction chamber, generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas, and forming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more.
    Type: Application
    Filed: June 18, 2021
    Publication date: October 7, 2021
    Inventors: Masayuki TSUKUI, Hajime NAGO, Yasushi IYECHIKA
  • Publication number: 20210234008
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer including Alx1Ga1-x1N (0?x1<1), a second semiconductor layer including Alx2In1-x2N (0<x2<1 and x1<x2), and an intermediate region provided between the first and second semiconductor layers. The intermediate region includes Alx3Ga1-x3N (0<x3?1 and x2<x3). The second semiconductor layer includes first and second surfaces. The second surface is between the intermediate region and the first surface in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The second semiconductor layer includes a plurality of first pits provided in the first surface. Widths of the first pits are 200 nm or more. A density in the first surface of the first pits is not less than 5×107/cm2 and not more than 1×108/cm2.
    Type: Application
    Filed: September 8, 2020
    Publication date: July 29, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime NAGO, Jumpei TAJIMA, Toshiki HIKOSAKA
  • Patent number: 11072856
    Abstract: Provided is a vapor phase growth method according to an embodiment including loading a first substrate into a reaction chamber, generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas, and forming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: July 27, 2021
    Assignee: NuFlare Technology, Inc.
    Inventors: Masayuki Tsukui, Hajime Nago, Yasushi Iyechika
  • Publication number: 20190271072
    Abstract: Provided is a vapor phase growth method according to an embodiment including loading a first substrate into a reaction chamber, generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas, and forming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 5, 2019
    Inventors: Masayuki Tsukui, Hajime Nago, Yasushi Iyechika
  • Patent number: 10351949
    Abstract: A vapor phase growth method according to an embodiment is a vapor phase growth method of forming on a single substrate a film having a composition different from a composition of the substrate. The method includes, rotating the single substrate with a center of the single substrate being a rotation center, heating a single substrate to a first temperature, and forming a silicon carbide film having a film thickness of 10 nm or more and 200 nm or less on a surface of the single substrate by supplying a first process gas containing silicon and carbon as a laminar flow in a direction substantially perpendicular to the surface of the single substrate.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: July 16, 2019
    Assignee: NuFlare Technology, Inc.
    Inventors: Hideshi Takahashi, Kiyotaka Miyano, Masayuki Tsukui, Hajime Nago, Yasushi Iyechika
  • Publication number: 20180171471
    Abstract: A vapor phase growth method according to an embodiment is a vapor phase growth method of forming on a single substrate a film having a composition different from a composition of the substrate. The method includes, rotating the single substrate with a center of the single substrate being a rotation center, heating a single substrate to a first temperature, and forming a silicon carbide film having a film thickness of 10 nm or more and 200 nm or less on a surface of the single substrate by supplying a first process gas containing silicon and carbon as a laminar flow in a direction substantially perpendicular to the surface of the single substrate.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 21, 2018
    Inventors: Hideshi TAKAHASHI, Kiyotaka MIYANO, Masayuki TSUKUI, Hajime NAGO, Yasushi IYECHIKA