Patents by Inventor Hajime Nago

Hajime Nago has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8564006
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 22, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 8525195
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, a light emitting portion, a multilayered structural body, and an n-side intermediate layer. The light emitting portion is provided between the semiconductor layers. The light emitting portion includes barrier layers containing GaN, and a well layer provided between the barrier layers. The well layer contains Inx1Ga1-x1N. The body is provided between the n-type semiconductor layer and the light emitting portion. The body includes: first layers containing GaN, and a second layer provided between the first layers. The second layer contains Inx2Ga1-x2N. Second In composition ratio x2 is not less than 0.6 times of first In composition ratio x1 and is lower than the first In composition x1. The intermediate layer is provided between the body and the light emitting portion and includes a third layer containing Aly1Ga1-y1N (0<y1?0.01).
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8525197
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Patent number: 8525203
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8466477
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 18, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Patent number: 8461606
    Abstract: According to one embodiment, a semiconductor light-emitting device includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light-emitting portion and a stacked body. The light-emitting portion is provided between the n-type and p-type semiconductor layers and includes a barrier layer and a well layer. The well layer is stacked with the barrier layer. The stacked body is provided between the light-emitting portion and the n-type semiconductor layer and includes a first layer and a second layer. The second layer is stacked with the first layer. Average In composition ratio of the stacked body is higher than 0.4 times average In composition ratio of the light-emitting portion. The layer thickness tb of the barrier layer is 10 nanometers or less.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Toshiyuki Oka, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
  • Patent number: 8455917
    Abstract: According to one embodiment, in a nitride semiconductor light emitting device, a first clad layer includes an n-type nitride semiconductor. An active layer is formed on the first clad layer, and includes an In-containing nitride semiconductor. A GaN layer is formed on the active layer. A first AlGaN layer is formed on the GaN layer, and has a first Al composition ratio. A p-type second AlGaN layer is formed on the first AlGaN layer, has a second Al composition ratio higher than the first Al composition ratio, and contains a larger amount of Mg than the GaN layer and the first AlGaN layer. A second clad layer is formed on the second AlGaN layer, and includes a p-type nitride semiconductor.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8441023
    Abstract: According to one embodiment, in a light emitting device, a substrate is transparent to a wavelength of emitted light. A first dielectric layer is formed in a first region on the substrate, and has a refractive index smaller than a refractive index of the substrate. A second dielectric layer is formed in a second region on the substrate surrounding the first region, and has a refractive index larger than the refractive index of the substrate. A first semiconductor layer is formed on the first dielectric layer, the second dielectric layer and the substrate. A second semiconductor layer is formed on the first semiconductor layer, and includes an active layer having a PN junction.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: May 14, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Masanobu Ando, Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20130087761
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Application
    Filed: February 27, 2012
    Publication date: April 11, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8390012
    Abstract: A semiconductor light emitting device has a support substrate, a light emitting element, and underfill material. The light emitting element includes a nitride-based group III-V compound semiconductor layer contacted via a bump on the support substrate. The underfill material is disposed between the support substrate and the light emitting element, the underfill material comprising a rib portion disposed outside of an end face of the light emitting element to surround the end surface of the light emitting element.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toru Gotoda, Hajime Nago, Toshiyuki Oka, Kotaro Zaima, Shinya Nunoue
  • Publication number: 20120319161
    Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting device. The method can include forming a nitride semiconductor layer including a light emitting layer on a first substrate having an unevenness, bonding the nitride layer to a second substrate, and separating the first substrate from the nitride layer by irradiating the nitride layer with light. The forming the nitride layer includes leaving a cavity in a space inside a depression of the unevenness while forming a thin film on the depression. The film includes a same material as part of the nitride layer. The separating includes causing the film to absorb part of the light so that intensity of the light applied to a portion of the nitride layer facing the depression is made lower than intensity of the light applied to a portion facing a protrusion of the unevenness.
    Type: Application
    Filed: February 27, 2012
    Publication date: December 20, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toru GOTODA, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima, Hiroshi Ono, Hajime Nago
  • Publication number: 20120299015
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.
    Type: Application
    Filed: February 27, 2012
    Publication date: November 29, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20120286237
    Abstract: According to one embodiment, a semiconductor light emitting device includes: an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The light emitting part is provided between the n-type semiconductor layer and the p-type semiconductor layer. The light emitting part includes: a plurality of well layers including Inx1Ga1-x1N (0<x1<1); and a barrier layer provided between the well layers and including GaN. The well layers including a p-side well layer being nearest to the p-type semiconductor layer among the well layers. The p-side well layer is thicker than all the well layers except the p-side well layer among the well layers. An In composition ratio in the p-side well layer is lower than an In composition ratio in all the well layers except the p-side well layer. A thickness of the barrier layer is not more than twice a thickness of the p-side well layer.
    Type: Application
    Filed: August 31, 2011
    Publication date: November 15, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Shigeya Kimura, Takahiro Sato, Taisuke Sato, Toshihide Ito, Shinya Nunoue
  • Publication number: 20120286284
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.
    Type: Application
    Filed: August 10, 2011
    Publication date: November 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Publication number: 20120153253
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type first semiconductor layer, a p-type second semiconductor layer and a light emitting layer. The light emitting layer is provided between the first and second semiconductor layers, and includes a plurality of barrier layers including a nitride semiconductor and a well layer provided between the barrier layers and including a nitride semiconductor containing In. The barrier layers and the well layer are stacked in a first direction from the second semiconductor layer toward the first semiconductor layer. The well layer has a p-side interface part and an n-side interface part. Each of the p-side and the n-side interface part include an interface with one of the barrier layers. A variation in a concentration of In in a surface perpendicular to the first direction of the p-side interface part is not more than that of the n-side interface part.
    Type: Application
    Filed: August 26, 2011
    Publication date: June 21, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Publication number: 20120138896
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 7, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Chie HONGO, Hajime NAGO, Shinya NUNOUE
  • Publication number: 20120138889
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Application
    Filed: August 4, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20120138895
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 7, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Publication number: 20120132943
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, an electrode, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer is provided between the n-type semiconductor layer and the electrode and includes a p-side contact layer contacting the electrode. The light emitting layer is provided between the n-type and the p-type semiconductor layers. The p-side contact layer includes a flat part having a plane perpendicular to a first direction from the n-type semiconductor layer toward the p-type semiconductor layer and multiple protruding parts protruding from the flat part toward the electrode. A height of the multiple protruding parts along the first direction is smaller than one-fourth of a dominant wavelength of light emitted from the light emitting layer. A density of the multiple protruding parts in the plane is 5×107/cm2 or more and 2×108/cm2 or less.
    Type: Application
    Filed: August 5, 2011
    Publication date: May 31, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime Nago, Koichi Tachibana, Toshihide Ito, Shinya Nunoue
  • Publication number: 20120056220
    Abstract: According to one embodiment, in a light emitting device, a substrate is transparent to a wavelength of emitted light. A first dielectric layer is formed in a first region on the substrate, and has a refractive index smaller than a refractive index of the substrate. A second dielectric layer is formed in a second region on the substrate surrounding the first region, and has a refractive index larger than the refractive index of the substrate. A first semiconductor layer is formed on the first dielectric layer, the second dielectric layer and the substrate. A second semiconductor layer is formed on the first semiconductor layer, and includes an active layer having a PN junction.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 8, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Taisuke SATO, Masanobu Ando, Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shinya Nunoue