Patents by Inventor Hajime Watakabe
Hajime Watakabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12294024Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.Type: GrantFiled: April 26, 2022Date of Patent: May 6, 2025Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Masashi Tsubuku, Kentaro Miura, Akihiro Hanada, Takaya Tamaru
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Patent number: 12287552Abstract: A display device includes a plurality of pixel electrodes each connected to a semiconductor device, a plurality of common electrodes each disposed opposite to a part of the plurality of pixel electrodes, and a plurality of common wirings each connected to the plurality of common electrodes. The semiconductor device includes an oxide semiconductor layer having a polycrystalline structure, and at least a part of each common wiring is composed of the oxide semiconductor layer. Each common electrode may be located across a plurality of pixel electrodes.Type: GrantFiled: November 14, 2023Date of Patent: April 29, 2025Assignee: JAPAN DISPLAY INC.Inventors: Hajime Watakabe, Masashi Tsubuku, Toshinari Sasaki, Takaya Tamaru
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Patent number: 12272696Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.Type: GrantFiled: December 22, 2023Date of Patent: April 8, 2025Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Toshihide Jinnai, Ryo Onodera, Akihiro Hanada
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Publication number: 20250113542Abstract: A semiconductor device comprises a first insulating layer; an oxide semiconductor layer having a polycrystalline structure on the first insulating layer; a gate insulating layer on the semiconductor oxide layer; a buffer layer on the gate insulating layer; a gate wiring on the buffer layer; and a second insulating layer on the gate wiring. The oxide semiconductor layer has a first region, a second region and a third region aligned toward a first direction. An electrical resistivity of the second region is higher than an electrical resistivity of the first region and lower than an electrical resistivity of the third region. A sheet resistance of the third region is less than 1000 ohm/square.Type: ApplicationFiled: September 17, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Akihiro HANADA, Takaya TAMARU, Masahiro WATABE
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Publication number: 20250113543Abstract: A semiconductor device according to an embodiment of the present invention includes an oxide semiconductor layer having a polycrystalline structure and including an impurity region containing an impurity element, a gate electrode over the oxide semiconductor layer, an insulating layer between the oxide semiconductor layer and the gate electrode, a first contact hole penetrating the insulating layer and exposing the impurity region, a second contact hole penetrating at least the insulating layer and having a greater depth than the first contact hole, and a connection wiring electrically connecting the impurity region to a layer which is exposed in the second contact hole through the first contact hole and the second contact hole. The connection wiring includes a first conductive layer and a second conductive layer on the first conductive layer. A portion of the first conductive layer that is exposed from the second conductive layer contains the impurity element.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Akihiro HANADA, Masahiro WATABE
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Publication number: 20250113535Abstract: A semiconductor device includes a light shielding layer, a first silicon nitride insulating layer in contact with the light shielding layer with a first interface, a first silicon oxide insulating layer in contact with the first silicon nitride layer with a second interface, and an oxide semiconductor layer over the first silicon oxide insulating layer. The first silicon oxide insulating layer is in contact with the second silicon oxide insulating layer. A thickness t of the first silicon nitride layer satisfies a condition in which light reflected at the first interface and light reflected at the second interface weaken each other when light having a wavelength of 450 nm is incident on the first silicon nitride insulating layer at an angle of 60 degrees from a normal direction of the second interface.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU, Marina MOCHIZUKI, Masahiro WATABE
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Publication number: 20250113546Abstract: A semiconductor device includes a gate electrode, an oxide semiconductor layer having a polycrystalline structure, and a gate insulating layer between the gate electrode and the oxide semiconductor layer. The oxide semiconductor layer includes a source region and a drain region each containing an impurity element, a channel region between the source region and the drain region, and a first region adjacent to the channel region. The first region includes a first edge extending along a first direction travelling from the source region to the drain region. The first region has a higher electrical resistivity than each of the source region and the drain region. An etching rate of the oxide semiconductor layer is less than 3 nm/min when the oxide semiconductor layer is etched using an etching solution containing phosphoric acid as a main component at 40° C.Type: ApplicationFiled: September 26, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Takeshi SAKAI, Akihiro HANADA, Masahiro WATABE
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Publication number: 20250113544Abstract: A semiconductor device according to an embodiment of the present invention includes: an oxide semiconductor layer; a first gate electrode facing the oxide semiconductor layer; a first gate insulating layer between the oxide semiconductor layer and the first gate electrode; an electrode arranged in a region overlapping the oxide semiconductor layer in a plan view and electrically connected to the oxide semiconductor layer; and a metal nitride layer between the oxide semiconductor layer and the electrode, wherein the oxide semiconductor layer is polycrystalline, and an etching rate of the oxide semiconductor layer with respect to an etchant containing phosphoric acid as a main component is less than 3 nm/min at 40° C.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Masahiro WATABE
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Publication number: 20250113618Abstract: A semiconductor device according to an embodiment of the present invention includes: a first semiconductor layer; a first gate electrode; a first gate insulating layer; a first insulating layer above the first gate electrode; a first electrode overlapping the first semiconductor layer, and electrically connected to the first semiconductor layer; a second semiconductor layer above the first insulating layer and made of a different material from the first semiconductor layer; a second gate electrode; a second gate insulating layer; a second electrode overlapping the second semiconductor layer, and electrically connected to the second semiconductor layer; and a first metal nitride layer between the second semiconductor layer and the second electrode, wherein the second semiconductor layer is polycrystalline, and an etching rate of the second semiconductor layer with respect to an etchant including phosphoric acid as a main component is less than 3 nm/min at 40° C.Type: ApplicationFiled: September 17, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Masahiro WATABE
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Publication number: 20250113617Abstract: A semiconductor device includes a first gate electrode, an oxide semiconductor layer including a first oxide semiconductor having a polycrystalline structure over the first gate electrode, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, and a second gate electrode overlapping the first gate electrode and the oxide semiconductor layer over the source electrode and the drain electrode. In a plan view, the second gate electrode is located with a space from each of the source electrode and the drain electrode. The second gate electrode is electrically connected to the first gate electrode.Type: ApplicationFiled: September 17, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Akihiro HANADA, Masahiro WATABE
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Publication number: 20250113709Abstract: A display device includes a light-emitting element, a first transistor, and a second transistor, the first transistor includes a first gate electrode, a first insulating film, a first oxide semiconductor layer, a second insulating film, and a first conductive layer provided on the second insulating film, and the second transistor includes the first insulating film, a second oxide semiconductor layer, a second insulating film, and a second gate electrode, wherein an etching rate of the first oxide semiconductor layer and the second semiconductor layer is less than 3 nm/min when the first oxide semiconductor layer and the second semiconductor layer are etched using an etching solution containing phosphoric acid as a main component at 40° C.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Masahiro WATABE
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Publication number: 20250113619Abstract: A semiconductor device includes a first gate electrode, an oxide semiconductor layer including a first oxide semiconductor having a polycrystalline structure over the first gate electrode, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, and a second gate electrode overlapping the first gate electrode and the oxide semiconductor layer over the source electrode and the drain electrode. The second gate electrode includes a second oxide semiconductor having a polycrystalline structure. The second gate electrode is electrically connected to the first gate electrode.Type: ApplicationFiled: September 20, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Hajime WATAKABE
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Publication number: 20250113625Abstract: A radiation detector according to an embodiment of the present invention includes: a transistor in which an oxide semiconductor layer is used in a channel of the transistor; a photoelectric converting layer connected to the transistor; a wavelength converting layer facing the photoelectric converting layer and capable of emitting visible light based on radioactive rays absorbed by the wavelength converting layer; and an oxide layer in contact with the oxide semiconductor layer between the transistor and the photoelectric converting layer, wherein a thickness of the oxide layer is 50 nm or less.Type: ApplicationFiled: September 26, 2024Publication date: April 3, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU, Marina MOCHIZUKI, Masahiro WATABE
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Publication number: 20250089302Abstract: A semiconductor device includes a metal oxide layer containing aluminum as a main component above an insulating surface, an oxide semiconductor layer on the metal oxide layer; a gate electrode facing the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode, wherein a water contact angle on an upper surface of the metal oxide layer is 20° or lower.Type: ApplicationFiled: November 26, 2024Publication date: March 13, 2025Applicant: Japan Display Inc.Inventors: Takaya TAMARU, Masashi TSUBUKU, Hajime WATAKABE, Toshinari SASAKI
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Publication number: 20250081540Abstract: A thin film transistor includes an oxide semiconductor layer having a polycrystalline structure over a substrate, a gate electrode over the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a first region having a first carrier concentration and overlapping the gate electrode, a second region having a second carrier concentration and not overlapping the gate electrode, and a third region between the first region and the second region and overlapping the gate electrode. The second carrier concentration is larger than the first carrier concentration. A carrier concentration of the third region decreases from the second region to the first region in a channel length direction. A length of the third region is greater than or equal to 0.00 ?m and less than or equal to 0.60 ?m in the channel length direction.Type: ApplicationFiled: November 18, 2024Publication date: March 6, 2025Applicants: Japan Display Inc., IDEMITSU KOSAN CO., LTD.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU, Emi KAWASHIMA, Yuki TSURUMA, Daichi SASAKI
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Publication number: 20250081617Abstract: A display device having a plurality of pixels arranged in a matrix along a first direction and a second direction intersecting the first direction, each of the plurality of pixels includes, a transistor including an oxide semiconductor layer, a gate wiring extending in the first direction opposite the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate wiring, a first conductive layer provided on at least one first insulating layer above the transistor and in contact with the oxide semiconductor layer, a second insulating layer provided on the first conductive layer, a first inorganic layer provided on the second insulating layer and having openings therein, and a second inorganic layer provided on the first inorganic layer and in contact with the second insulating layer in the opening.Type: ApplicationFiled: August 28, 2024Publication date: March 6, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Akihiro HANADA, Takaya TAMARU, Marina MOCHIZUKI, Masahiro WATABE
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Patent number: 12237345Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.Type: GrantFiled: August 8, 2023Date of Patent: February 25, 2025Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Isao Suzumura, Akihiro Hanada, Yohei Yamaguchi
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Publication number: 20250063761Abstract: A semiconductor device includes a metal oxide layer containing aluminum over an insulating surface and an oxide semiconductor layer over the metal oxide layer. The oxide semiconductor layer includes a first crystal region in contact with the metal oxide layer and a second crystal region in contact with the first crystal region and having a larger area than the first crystal region in a cross-sectional view of the oxide semiconductor layer. The first crystal region and the second crystal region differ from each other in at least one of a crystal structure and a crystal orientation.Type: ApplicationFiled: November 1, 2024Publication date: February 20, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU
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Publication number: 20250063751Abstract: A method for manufacturing a semiconductor device comprises steps of: forming an oxide semiconductor layer on a substrate by a sputtering method; performing a first heat treatment on the oxide semiconductor layer after placing the substrate on which the oxide semiconductor layer is formed in a heating furnace having a heating medium maintained at a preset temperature; forming a gate insulating layer on the oxide semiconductor layer after the first heat treatment; and forming a gate electrode on the gate insulating layer. When the substrate is installed in the heating furnace, a temperature drop of the heating medium is kept within 15% of the set temperature.Type: ApplicationFiled: November 1, 2024Publication date: February 20, 2025Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU
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Patent number: 12224332Abstract: The purpose of the present invention is to suppress a change in characteristics of a TFT using an oxide semiconductor film caused by that oxygen in the oxide semiconductor film is extracted by metal electrode. The main structure of the present invention is as follows. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film; the oxide semiconductor film including a channel region, a drain region, and a source region; in which a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view; and the metal nitride film is not formed at a part of the top surface of the gate electrode.Type: GrantFiled: March 30, 2022Date of Patent: February 11, 2025Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Takuo Kaitoh, Hajime Watakabe