Patents by Inventor Hajime Watakabe

Hajime Watakabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367528
    Abstract: A semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Hajime WATAKABE, Kazufumi WATABE
  • Publication number: 20220367691
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.
    Type: Application
    Filed: April 26, 2022
    Publication date: November 17, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Masashi TSUBUKU, Kentaro MIURA, Akihiro HANADA, Takaya TAMARU
  • Patent number: 11442515
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: September 13, 2022
    Assignee: JAPAN DISPLAY INC.
    Inventors: Akihiro Hanada, Hajime Watakabe, Kazufumi Watabe
  • Publication number: 20220278137
    Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Hajime WATAKABE, Toshihide JINNAI, Ryo ONODERA, Akihiro HANADA
  • Publication number: 20220246764
    Abstract: The present invention addresses the problem of: realizing a TFT that uses an oxide semiconductor and that is capable of maintaining stable characteristics even in the case where the TFT is miniaturized; and realizing a display device that has high-definition pixels using such a TFT. To solve this problem, the present invention has the following configuration. A semiconductor device including an oxide semiconductor TFT formed using an oxide semiconductor film 109, the semiconductor device being characterized in that: the channel length of the oxide semiconductor TFT is 1.3 to 2.3 ?m; and the sheet resistance of a source region 1092 and a drain region 1091 of the oxide semiconductor film 109 is 1.4 to 20 K?/?.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: Japan Display Inc.
    Inventors: Isao SUZUMURA, Hajime WATAKABE, Akihiro HANADA, Ryo ONODERA, Tomoyuki ITO
  • Publication number: 20220238558
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a polycrystalline silicon semiconductor, an oxide semiconductor, a gate electrode located directly above the oxide semiconductor, a first conductive layer in contact with the polycrystalline silicon semiconductor via a first contact hole, and in contact with the oxide semiconductor via a second contact hole and a second conductive layer stacked on the first conductive layer between the first contact hole and the second contact hole. The first conductive layer includes an extending portion extending from the second contact hole toward the gate electrode. The second conductive layer is not stacked on the extending portion. The first conductive layer is thinner than the second conductive layer.
    Type: Application
    Filed: January 25, 2022
    Publication date: July 28, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Kentaro MIURA, Akihiro HANADA
  • Publication number: 20220231149
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device comprises forming an oxide semiconductor layer, forming a gate insulating layer in contact with the oxide semiconductor layer and covering the oxide semiconductor layer, and forming a gate electrode on the gate insulating layer so as to overlap the oxide semiconductor layer, and injecting boron through the gate electrode and the gate insulating layer after forming the gate electrode, wherein a boron concentration included in a region of the gate insulating layer overlapping the gate electrode is in a range of 1E+16 [atoms/cm3] or more.
    Type: Application
    Filed: January 14, 2022
    Publication date: July 21, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Kentaro MIURA, Hajime WATAKABE, Masashi TSUBUKU, Toshinari SASAKI, Takaya TAMARU, Takeshi SAKAI
  • Publication number: 20220223707
    Abstract: The purpose of the present invention is to suppress a change in characteristics of a TFT using an oxide semiconductor film caused by that oxygen in the oxide semiconductor film is extracted by metal electrode. The main structure of the present invention is as follows. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film; the oxide semiconductor film including a channel region, a drain region, and a source region; in which a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view; and the metal nitride film is not formed at a part of the top surface of the gate electrode.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro Hanada, Takuo Kaitoh, Hajime Watakabe
  • Publication number: 20220190164
    Abstract: According to one embodiment, a semiconductor device includes an oxide semiconductor. The oxide semiconductor includes a first edge portion and a second edge portion intersecting a gate electrode, a first area overlapping the gate electrode, a second area along the first edge portion, a third area along the second edge portion, a fourth area the first edge portion, a fifth area along the second edge portion, a sixth area surrounded by the first area, the second area and the third area, and a seventh area surrounded by the first area, the fourth area and the fifth area. The first area, the second area and the third area, the fourth area and the fifth area have a higher resistivity than those of the sixth area and the seventh area.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 16, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Kentaro MIURA, Toshinari SASAKI, Takeshi SAKAI, Akihiro HANADA, Masashi TSUBUKU
  • Patent number: 11362113
    Abstract: There is provided a technique that enables a reduction in the display failure of a display device and the improvement of the yields of the display device in a display device that adopts a semiconductor device including a thin film transistor using an oxide semiconductor. A semiconductor device according to an embodiment includes a thin film transistor having an oxide semiconductor. The oxide semiconductor has a drain region, a source region, and a channel region provided between the drain region and the source region. The thin film transistor includes a gate insulating film provided on the channel region, an aluminum oxide film provided on the gate insulating film, an insulating film provided on the aluminum oxide film, and a gate electrode provided on the insulating film.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: June 14, 2022
    Assignee: Japan Display Inc.
    Inventors: Hajime Watakabe, Toshihide Jinnai, Ryo Onodera, Akihiro Hanada
  • Publication number: 20220181493
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a first insulating layer above a polycrystalline silicon semiconductor, forming an oxide semiconductor on the first insulating layer, forming a second insulating layer on the oxide semiconductor, forming contact holes penetrating to the polycrystalline silicon semiconductor in insulating layers including the first insulating layer and the second insulating layer, forming a metal film on the second insulating layer, forming a patterned resist on the metal film, etching the metal film using the resist as a mask, performing ion implantation into the oxide semiconductor without removing the resist, and removing the resist.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 9, 2022
    Applicant: Japan Display Inc.
    Inventors: Kentaro MIURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20220173247
    Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.
    Type: Application
    Filed: November 9, 2021
    Publication date: June 2, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Hajime WATAKABE, Takuo KAITOH, Ryo ONODERA
  • Publication number: 20220165826
    Abstract: According to one embodiment, in a display device, a first transistor includes a first semiconductor layer, in which a first source region includes a first region in contact a the first source electrode and a first drain region includes a second region in contact with a first drain electrode, the first source and drain regions, the first region, and the second region each include a first impurity element, and, in a region close to an interface between the first semiconductor layer and a first insulating layer, a concentration of the first impurity element included in the first and second regions is higher than a concentration of the first impurity element included in the first source region and the first drain region.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 26, 2022
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Kentaro MIURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20220043316
    Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 10, 2022
    Applicant: Japan Display Inc.
    Inventors: Toshihide JINNAI, Hajime WATAKABE, Akihiro HANADA, Ryo ONODERA, lsao SUZUMURA
  • Publication number: 20220029026
    Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
    Type: Application
    Filed: October 13, 2021
    Publication date: January 27, 2022
    Applicant: Japan Display Inc.
    Inventors: Hajime WATAKABE, Tomoyuki ITO, Toshihide JINNAI, lsao SUZUMURA, Akihiro HANADA, Ryo ONODERA
  • Publication number: 20210405411
    Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.
    Type: Application
    Filed: September 10, 2021
    Publication date: December 30, 2021
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshihide JINNAI, Isao SUZUMURA, Hajime WATAKABE, Ryo ONODERA
  • Publication number: 20210391359
    Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.
    Type: Application
    Filed: August 27, 2021
    Publication date: December 16, 2021
    Inventors: Hajime WATAKABE, Isao SUZUMURA, Akihiro HANADA, Yohei YAMAGUCHI
  • Patent number: 11181792
    Abstract: A display device including a substrate having a first TFT of an oxide semiconductor and a second TFT of a polysilicon semiconductor comprising: the oxide semiconductor 109 is covered by a first insulating film, a first drain electrode 110 is connected to the oxide semiconductor 109 via a first through hole 132 formed in the first insulating film, a first source electrode 111 is connected to the oxide semiconductor 109 via second through hole 133 formed in the first insulating film in the first TFT, a second insulating film is formed covering the first drain electrode 110 and the first source electrode 111, a drain wiring connects 12 to the first drain electrode 110 via a third through hole 130 formed in the second insulating film, a source wiring 122 is connected to the first source electrode 111 via a fourth through hole 131 formed in the second insulating film.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 23, 2021
    Assignee: JAPAN DISPLAY INC.
    Inventors: Toshihide Jinnai, Hajime Watakabe, Akihiro Hanada, Ryo Onodera, Isao Suzumura
  • Patent number: 11177388
    Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: November 16, 2021
    Assignee: JAPAN DISPLAY INC.
    Inventors: Hajime Watakabe, Tomoyuki Ito, Toshihide Jinnai, Isao Suzumura, Akihiro Hanada, Ryo Onodera
  • Publication number: 20210320158
    Abstract: The purpose of the present invention is to increase ON current of the oxide semiconductor thin film transistor. An example of the structure that attains the purpose is: a display device having a substrate and a thin film transistor of an oxide semiconductor formed on the substrate including: a thickness of a source region and a drain region is thicker than a thickness of a channel region of the oxide semiconductor, the channel region has projections at portions contacting the source region and the drain region, a thickness of the projection is thicker than a thickness of the center of the channel region, and a thickness of the projection is thicker than a thickness of the source region and the drain region.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 14, 2021
    Applicant: Japan Display Inc.
    Inventors: Akihiro HANADA, Toshihide JINNAI, Isao SUZUMURA, Hajime WATAKABE, Ryo ONODERA