Patents by Inventor Hamid Eslampour
Hamid Eslampour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250046775Abstract: Described herein is a packaging approach that employs a remapping layer to maintain compatibility to different types of electronic chips while allowing chip designers to standardize the layout of the electrical interface of a photonic interposer. A remapping layer remaps the electrical interface of an electronic chip to the electrical interface of a photonic interposer. Remapping layers may be implemented in various ways, including for example as monolithic electronic interposers and/or as individual remapping chips. In some embodiments, to reduce manufacturing costs, remapping layers may be implemented using passive electronics (without transistors). Because remapping layers are significantly less costly to manufacture than photonic interposers, shifting the need to provide ad hoc electrical interfaces from the photonic interposer to the remapping layer enhances the applicability of photonic interposers in computational, telecom and datacom settings.Type: ApplicationFiled: July 31, 2024Publication date: February 6, 2025Applicant: Lightmatter, Inc.Inventors: Chian-min Richard Ho, Clifford Chao, Jessie Rosenberg, Anthony Kopa, Hamid Eslampour, Darius Bunandar
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Publication number: 20240178923Abstract: Described herein are techniques for intra-chip communication within tiled photonic interposers. A photonic interposer may rely on a combination of photonic lanes and electric lanes. For example, a photonic interposer may comprise a photonic integrated circuit (PIC) lithographically patterned with an array of photonic tiles, each photonic tile comprising an on-chip communication unit. The array of photonic tiles is arranged in rows and columns. A plurality of electric lanes place the on-chip communication units of photonic tiles of different rows in electrical communication with one another. A plurality of photonic lanes place the on-chip communication units of photonic tiles of different columns in optical communication with one another.Type: ApplicationFiled: November 22, 2023Publication date: May 30, 2024Applicant: Lightmatter, Inc.Inventors: Darius Bunandar, Mykhailo Tymchenko, Shashank Gupta, Michael Gould, Alexander Sludds, Carlos Dorta-Quinones, Anthony Kopa, Adam Mendrela, Clifford Chao, Hamid Eslampour, Ritesh Jain, Chain-min Richard Ho, Nicholas C. Harris
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Semiconductor package with built-in vibration isolation, thermal stability, and connector decoupling
Patent number: 11834328Abstract: A semiconductor package with design features, including an isolation structure for internal components and a flexible electrical connection, that minimizes errors due to environmental temperature, shock, and vibration effects. The semiconductor package may include a base having a first portion surrounded by a second portion. A connector assembly may be attached to the first portion. The connector assembly may extend through an opening in the base. A lid attached may be attached to, at least, the second portion. The attached lid may form a hermetically-sealed cavity defined by an upper surface of the first portion, the connector assembly, and an inner surface of the lid. An elastomer pad may be on the first portion and a sub-assembly may be on the elastomer pad. A flexible electrical connection may be formed between the connector assembly and the sub-assembly.Type: GrantFiled: March 15, 2021Date of Patent: December 5, 2023Assignee: InvenSense, Inc.Inventors: Hamid Eslampour, Karthik Katingari, Adam Martin -
Publication number: 20230314711Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.Type: ApplicationFiled: March 27, 2023Publication date: October 5, 2023Applicant: Lightmatter, Inc.Inventors: Hamid Eslampour, Shashank Gupta, James Carr
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Publication number: 20220374575Abstract: Electronic-photonic packages and related fabrication methods are described. A package may include a plurality of photonic integrated circuits (PICs), where each PIC comprises a photonic accelerator configured to perform matrix multiplication in the optical domain. The package may further include an application specific integrated circuit (ASIC) configured to control at least one of the photonic accelerators. The package further includes an interposer. The plurality of PICs are coupled to a first side of the interposer and the ASIC is coupled to a second side of the interposer opposite the first side. A first thermally conductive member in thermal contact with at least one of the PICs. The first thermally conductive member may include a heat spreader. A second thermally conductive member in thermal contact with the ASIC. The second thermally conductive member may include a lid.Type: ApplicationFiled: May 19, 2022Publication date: November 24, 2022Applicant: Lightmatter, Inc.Inventors: Carl Ramey, Nicholas C. Harris, Hamid Eslampour
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Semiconductor Package With Built-In Vibration Isolation, Thermal Stability, And Connector Decoupling
Publication number: 20210403318Abstract: A semiconductor package with design features, including an isolation structure for internal components and a flexible electrical connection, that minimizes errors due to environmental temperature, shock, and vibration effects. The semiconductor package may include a base having a first portion surrounded by a second portion. A connector assembly may be attached to the first portion. The connector assembly may extend through an opening in the base. A lid attached may be attached to, at least, the second portion. The attached lid may form a hermetically-sealed cavity defined by an upper surface of the first portion, the connector assembly, and an inner surface of the lid. An elastomer pad may be on the first portion and a sub-assembly may be on the elastomer pad. A flexible electrical connection may be formed between the connector assembly and the sub-assembly.Type: ApplicationFiled: March 15, 2021Publication date: December 30, 2021Inventors: Hamid Eslampour, Karthik Katingari, Adam Martin -
Patent number: 8409921Abstract: A method of manufacture of an integrated circuit package system includes: providing a substrate with a top surface; configuring the top surface to include electrical contacts and an integrated circuit; providing a structure over the substrate with only a honeycomb meshwork of posts contacting the top surface of the substrate; and depositing a material to prevent warpage of the substrate on the top surface of the substrate and over the integrated circuit, the material patterned to have discrete hollow conduits that expose the electrical contacts.Type: GrantFiled: July 12, 2010Date of Patent: April 2, 2013Assignee: Stats Chippac Ltd.Inventors: Heap Hoe Kuan, Hamid Eslampour, DaeSik Choi, Rui Huang, Taeg Ki Lim
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Patent number: 8057108Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: GrantFiled: July 30, 2010Date of Patent: November 15, 2011Assignee: Intel CorporationInventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Li, Jesper Arentoft Jayaswal
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Publication number: 20100296773Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: ApplicationFiled: July 30, 2010Publication date: November 25, 2010Inventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Lin, Jesper Arentoft Jayaswal
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Publication number: 20100279504Abstract: A method of manufacture of an integrated circuit package system includes: providing a substrate with a top surface; configuring the top surface to include electrical contacts and an integrated circuit; providing a structure over the substrate with only a honeycomb meshwork of posts contacting the top surface of the substrate; and depositing a material to prevent warpage of the substrate on the top surface of the substrate and over the integrated circuit, the material patterned to have discrete hollow conduits that expose the electrical contacts.Type: ApplicationFiled: July 12, 2010Publication date: November 4, 2010Inventors: Heap Hoe Kuan, Hamid Eslampour, DaeSik Choi, Rui Huang, Taeg Ki Lim
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Patent number: 7780360Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: GrantFiled: July 21, 2008Date of Patent: August 24, 2010Assignee: Intel CorporationInventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Li, Jesper Arentoft Jayaswal
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Publication number: 20090226135Abstract: Optical components may be precisely positioned in three dimensions with respect to one another. A bonder which has the ability to precisely position the components in two dimensions can be utilized. The components may be equipped with contacts at different heights so that as the components come together in a third dimension, their relative positions can be sensed. This information may be fed back to the bonder to control the precise alignment in the third dimension.Type: ApplicationFiled: May 12, 2009Publication date: September 10, 2009Inventors: Ut Tran, Hamid Eslampour
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Publication number: 20080279236Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: ApplicationFiled: July 21, 2008Publication date: November 13, 2008Inventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Li, Jesper Arentoft Jayaswal
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Patent number: 7401986Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: GrantFiled: August 1, 2006Date of Patent: July 22, 2008Assignee: Intel CorporationInventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Li, Jesper Jayaswal-Arentoft
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Publication number: 20070274640Abstract: Optical components may be precisely positioned in three dimensions with respect to one another. A bonder which has the ability to precisely position the components in two dimensions can be utilized. The components may be equipped with contacts at different heights so that as the components come together in a third dimension, their relative positions can be sensed. This information may be fed back to the bonder to control the precise alignment in the third dimension.Type: ApplicationFiled: July 11, 2007Publication date: November 29, 2007Inventors: Ut Tran, Hamid Eslampour
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Publication number: 20060285106Abstract: Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed in a semiconductor substrate to propagate an optical signal received at a first end of the waveguide. The trench may also be formed in the waveguide having a first sidewall and a second sidewall, the first and second sidewalls forming first and second angles with the waveguide's propagation direction. The second sidewall may include a reflective surface formed thereon. The photodetector may be configured to receive an optical signal propagated in the waveguide, through the first sidewall and reflected from the reflective surface on the second sidewall.Type: ApplicationFiled: August 1, 2006Publication date: December 21, 2006Inventors: Achintya Bhowmik, Nagesh Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William Wong, Ruolin Li, Jesper Jayaswal
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Publication number: 20060273454Abstract: Some embodiments of the present invention include locking mechanisms for die assembly.Type: ApplicationFiled: June 6, 2005Publication date: December 7, 2006Inventors: Daogiang Lu, Hamid Eslampour, Edward Prack, Edward Zarbock
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Patent number: 7099360Abstract: An optical transmitter includes an external cavity laser array formed in a PLC, a trench-based detector array and an AWG. The external cavity laser is formed using an array of substantially similar laser gain blocks and an array of gratings formed in waveguides connected to the gain blocks. Each grating defines the output wavelength for its corresponding external cavity laser. Each detector of the detector array includes a coupler to cause a portion of a corresponding laser output signal of the laser array to propagate through a first sidewall of a trench and reflect off a second sidewall of the trench to a photodetector. In one embodiment, the photodetector outputs a signal indicative of the power level of the reflected signal, which a controller uses to control the laser array to equalize the power of the laser output signals.Type: GrantFiled: February 3, 2003Date of Patent: August 29, 2006Assignee: Intel CorporationInventors: Achintya K. Bhowmik, Nagesh K. Vodrahalli, Gennady Farber, Hai-Feng Liu, Hamid Eslampour, Ut Tran, William B. Wong, Ruolin Li, Jesper Jayaswal-Arentoff
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Publication number: 20060182395Abstract: Optical components may be precisely positioned in three dimensions with respect to one another. A bonder which has the ability to precisely position the components in two dimensions can be utilized. The components may be equipped with contacts at different heights so that as the components come together in a third dimension, their relative positions can be sensed. This information may be fed back to the bonder to control the precise alignment in the third dimension.Type: ApplicationFiled: March 29, 2006Publication date: August 17, 2006Inventors: Ut Tran, Hamid Eslampour
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Patent number: 7050682Abstract: Optical components may be precisely positioned in three dimensions with respect to one another. A bonder which has the ability to precisely position the components in two dimensions can be utilized. The components may be equipped with contacts at different heights so that as the components come together in a third dimension, their relative positions can be sensed. This information may be fed back to the bonder to control the precise alignment in the third dimension.Type: GrantFiled: July 5, 2005Date of Patent: May 23, 2006Assignee: Intel CorporationInventors: Ut Tran, Hamid Eslampour