Abstract: A method of preparing a lithium-ion battery electrode, S1, preparing a carbon nanotube raw material; S2, providing an electrode active material and a solvent; S3, mixing the carbon nanotube raw material and the electrode active material with the solvent to form a mixture, and stirring the mixture to form an electrode mixture; and S4, spraying the electrode mixture on a substrate to form an electrode layer, and removing the substrate and drying the electrode layer to form the lithium-ion battery electrode.

Abstract: An anode active material for lithium-ion battery is provided. The anode active material includes a composite material comprising a binary or multi-element metal alloy and a conductive material. The binary or multi-element metal alloy is granular, a particle size of a binary or multi-element metal alloy particle is in micron-sized, and the binary or multi-element metal alloy has lattice reversibility. The conductive material is coated on a surface of a binary or multi-element metal alloy particle. The binary or multi-element metal alloy particle is completely wrapped by the conductive material. A method of making the anode active material is also provided. A lithium-ion battery using the anode active material is also provided.

Abstract: A solid electrolyte three-electrode electrochemical test device comprises a housing, a working electrode, a counter electrode, a reference electrode, a first conductive structure, a second conductive structure, a third conductive structure, and a solid electrolyte layer. The housing comprises a groove and a first through hole located at a bottom of the groove. The reference electrode is insulated from the counter electrode. The first conductive structure and the working electrode are stacked with each other, and the working electrode and at least a part of the first conductive structure are located in the first through hole. The solid electrolyte layer, the counter electrode, the reference electrode, the second conductive structure and the third conductive structure are located in the groove, and the first conductive structure, the working electrode, the solid electrolyte layer, the counter electrode, and the second conductive structure are sequentially stacked and located coaxially with each other.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure over a substrate. The method includes forming a dielectric layer over the substrate and the first fin structure. The dielectric layer has a first trench exposing a first portion of the first fin structure. The method includes forming a first work function layer in the first trench. The method includes forming a first mask layer over the first work function layer in the first trench, wherein an upper portion of the first work function layer in the first trench is exposed by the first mask layer. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench.

Abstract: A semiconductor device structure is provided. The device includes a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The includes a gate material layer in the trench. The gate material has a topmost surface that is highly planar.

Abstract: A method includes forming an opening in a dielectric to reveal a protruding semiconductor fin, forming a gate dielectric on sidewalls and a top surface of the protruding semiconductor fin, and forming a conductive diffusion barrier layer over the gate dielectric. The conductive diffusion barrier layer extends into the opening. The method further includes forming a silicon layer over the conductive diffusion barrier layer and extending into the opening, and performing a dry etch on the silicon layer to remove horizontal portions and vertical portions of the silicon layer. After the dry etch, a conductive layer is formed over the conductive diffusion barrier layer and extending into the opening.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.

Abstract: A method includes forming an opening in a dielectric to reveal a protruding semiconductor fin, forming a gate dielectric on sidewalls and a top surface of the protruding semiconductor fin, and forming a conductive diffusion barrier layer over the gate dielectric. The conductive diffusion barrier layer extends into the opening. The method further includes forming a silicon layer over the conductive diffusion barrier layer and extending into the opening, and performing a dry etch on the silicon layer to remove horizontal portions and vertical portions of the silicon layer. After the dry etch, a conductive layer is formed over the conductive diffusion barrier layer and extending into the opening.

Abstract: A lithium ion battery electrolyte comprising a glyceryl ether epoxy resin gel is provided. The glyceryl ether epoxy resin gel comprises a glyceryl ether epoxy resin and an electrolyte. The glyceryl ether epoxy resin is a cross-linked polymer obtained by a ring-opening reaction of a glyceryl ether polymer and a polyamine compound. The glyceryl ether polymer is a glycidyl ether polymer comprising at least two epoxy groups, and the polyamine compound comprises at least two amine groups. The cross-linked polymer comprises a main chain and a plurality of hydroxyl groups, and the plurality of hydroxyl groups are located on the main chain. The electrolyte comprises a lithium salt and a non-aqueous solvent. The lithium salt and the glyceryl ether epoxy resin are dispersed in the non-aqueous solvent. A method of making the lithium ion battery electrolyte is also provided.

Abstract: A method of testing an oxidation potential of an electrolyte is provided. The method comprises: arranging an electrolyte between a working electrode and an auxiliary electrode to form an electrolytic cell; applying a first voltage U1 between the working electrode and the auxiliary electrode for a time ?t; applying a second voltage U2 between the working electrode and the auxiliary electrode for the time ?t, wherein U2=U1+?U; likewise, applying a nth voltage Un between the working electrode and the auxiliary electrode for the time ?t, to obtain a change curve of a current and an electric potential of the electrolytic cell with time, wherein Un=U(n?1)+?U, and n is an integer greater than or equal to 4; and obtaining the oxidation potential of the lithium ion battery electrolyte according to the change curve.

Abstract: A test device for testing an oxidation potential of an electrolyte is provided. The test device comprises a cavity, a test unit, a detector, a processing unit, and a display. The test unit comprises a positive plate comprising a first through hole, a negative plate comprising a second through hole, a first infrared window covering the first through hole, a second infrared window covering the second through hole, and an electrolyte located between the positive electrode plate and the negative electrode plate. The first through hole and the second through hole penetrate each other. The first infrared window, the positive plate, the negative plate, and the second infrared window are stacked with each other.

Abstract: A glyceryl ether epoxy resin and a method of making it are provided. The glyceryl ether epoxy resin is a cross-linked polymer obtained by a ring-opening reaction of a glyceryl ether polymer and a polyamine compound. The glyceryl ether polymer is a glycidyl ether polymer comprising at least two epoxy groups, and the polyamine compound comprises at least two amine groups. The cross-linked polymer is a cross-linked three-dimensional network structure, the cross-linked polymer comprises a main chain and a plurality of hydroxyl groups, and the plurality of hydroxyl groups are located on the main chain. An epoxy structure of the glyceryl ether polymer is located on the main chain.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first fin structure over a substrate. The method includes forming a dielectric layer over the substrate and the first fin structure. The dielectric layer has a first trench exposing a first portion of the first fin structure. The method includes forming a first work function layer in the first trench. The method includes forming a first mask layer over the first work function layer in the first trench, wherein an upper portion of the first work function layer in the first trench is exposed by the first mask layer. The method includes removing the first work function layer exposed by the first mask layer. The method includes removing the first mask layer. The method includes forming a first gate electrode in the first trench.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first fin structure and a second fin structure disposed over the substrate. The semiconductor device structure includes a first gate stack disposed over the substrate and overlapping the first fin structure. The first gate stack includes a first work function layer, a first gate electrode, and a first hard mask layer, the first gate electrode is over the first work function layer, the first hard mask layer is over the first gate electrode, the first gate electrode has a first convex top surface protruding beyond a first top surface of the first work function layer. The semiconductor device structure includes a second gate stack disposed over the substrate and overlapping the second fin structure.

Abstract: A method includes forming an opening in a dielectric to reveal a protruding semiconductor fin, forming a gate dielectric on sidewalls and a top surface of the protruding semiconductor fin, and forming a conductive diffusion barrier layer over the gate dielectric. The conductive diffusion barrier layer extends into the opening. The method further includes forming a silicon layer over the conductive diffusion barrier layer and extending into the opening, and performing a dry etch on the silicon layer to remove horizontal portions and vertical portions of the silicon layer. After the dry etch, a conductive layer is formed over the conductive diffusion barrier layer and extending into the opening.

Abstract: A method includes forming an opening in a dielectric to reveal a protruding semiconductor fin, forming a gate dielectric on sidewalls and a top surface of the protruding semiconductor fin, and forming a conductive diffusion barrier layer over the gate dielectric. The conductive diffusion barrier layer extends into the opening. The method further includes forming a silicon layer over the conductive diffusion barrier layer and extending into the opening, and performing a dry etch on the silicon layer to remove horizontal portions and vertical portions of the silicon layer. After the dry etch, a conductive layer is formed over the conductive diffusion barrier layer and extending into the opening.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.

Abstract: A display apparatus and a driving method of a display panel are provided. A display driver drives the display panel so that the adjacent pixels in each of first display segments and each of the second display segments on a scan line have opposite polarities, and two pixels located on junction section of adjacent first display segment and second display segment have the same polarity.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first fin structure and a second fin structure disposed over the substrate. The semiconductor device structure includes a first gate stack disposed over the substrate and overlapping the first fin structure. The first gate stack includes a first work function layer, a first gate electrode, and a first hard mask layer, the first gate electrode is over the first work function layer, the first hard mask layer is over the first gate electrode, the first gate electrode has a first convex top surface protruding beyond a first top surface of the first work function layer. The semiconductor device structure includes a second gate stack disposed over the substrate and overlapping the second fin structure.