Patents by Inventor Han Gu
Han Gu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11952652Abstract: Provided is a method of manufacturing a zinc-plated steel sheet. The method includes: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; and zinc plating the annealed steel sheet by dipping in a molten zinc plating bath. Further provided is a method of manufacturing a hot-press part including: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; zinc plating the annealed steel sheet by dipping in a molten zinc plating bath; heating the zinc-plated steel sheet; and press forming the heated steel sheet.Type: GrantFiled: March 7, 2018Date of Patent: April 9, 2024Assignee: POSCO CO., LTDInventors: Il-Ryoung Sohn, Jong-Sang Kim, Joong-Chul Park, Yeol-Rae Cho, Jin-Keun Oh, Han-Gu Cho, Bong-Hoon Chung, Jong-Seog Lee
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Publication number: 20220297003Abstract: This application discloses a method and apparatus for displaying a virtual item, an electronic device, and a storage medium, and belongs to the field of computer technologies. The method includes: displaying a virtual object in a virtual scene, the virtual object having a plurality of virtual items, and the plurality of virtual items respectively having virtual functions; and displaying a virtual combined item in the virtual scene in response to a first trigger operation targeting at least two virtual items of the plurality of virtual items, the virtual combined item being obtained by combining the at least two virtual items, and the virtual combined item supporting a new virtual function different from the virtual functions of the at least two virtual items.Type: ApplicationFiled: May 18, 2022Publication date: September 22, 2022Applicant: Tencent Technology (Shenzhen) Company LimitedInventors: Han GU, Jianquan LI, Tao LIU, Liangliang CHEN
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Publication number: 20220293089Abstract: The present application discloses a voice dialogue processing method and apparatus. The voice dialogue processing method includes: determining a voice semantics corresponding to a user voice to be processed; determining a reply sentence for the voice semantics based on a dialogue management engine, a training sample set of which is constructed from a dialogue business customization file including at least one dialogue flow, and the dialogue flow includes a plurality of dialogue nodes in a set order; and generating a customer service voice for replying to the user voice according to the determined reply sentence.Type: ApplicationFiled: December 9, 2019Publication date: September 15, 2022Applicant: AI Speech Co., Ltd.Inventors: Xin DONG, Zhongyuan DAI, Min CHU, Han GU
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Publication number: 20220164498Abstract: The present invention belongs to the precise and efficient processing field of micro parts, in particular to a deformation prediction method of micro-milling thin-walled parts. Firstly, based on the finite element simulation software, a finite element simulation model of micro-milling thin-walled parts is established. Johnson-Cook material model and failure criterion are used to describe the material properties and damage criteria of the machined materials, so as to realize the prediction of milling force in the micro-milling process. The accuracy of the model is verified by experiments. Then, based on the birth-death element method, a deformation prediction model of micro-milling thin-walled parts model is established, and the milling force output from the finite element simulation model is loaded into the deformation prediction model. Finally, the deformation prediction of d micro-milling thin-walled parts is realized.Type: ApplicationFiled: April 19, 2021Publication date: May 26, 2022Inventors: Xiaohong LU, Yihan LUAN, Zhenyuan JIA, Feixiang RUAN, Han GU
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Patent number: 11108229Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal.Type: GrantFiled: July 18, 2018Date of Patent: August 31, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-Pil Jang, Chang-Su Kim, Han-Gu Kim, Moon-Seok Yang, Kyoung-Ki Jeon
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Patent number: 10576428Abstract: An apparatus includes 1) a filtration device including a filtration module to generate a filtrate from an input stream; 2) a desalination device fluidly connected to the filtration device; and 3) a controller configured to direct operation of the filtration device and the desalination device. In a first mode of operation, the filtration module is configured to perform filtration as part of generating the filtrate. In a second mode of operation, the filtration module is configured to receive an output from the desalination device such that the output backwashes the filtration module. The controller is configured to monitor a change in membrane resistance of the filtration module during the first mode of operation, and is configured to trigger the filtration module to enter the second mode of operation based on the change in membrane resistance.Type: GrantFiled: January 25, 2017Date of Patent: March 3, 2020Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Yoram Cohen, Panagiotis D. Christofides, Han Gu, Larry Xingming Gao, Anditya Rahardianto
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Patent number: 10488452Abstract: A test board for a semiconductor device and a test board including the same are provided. A test board includes a substrate, a mounting pad which is formed on the substrate and on which a semiconductor chip is mounted and a test terminal group arranged on the substrate to be spaced apart from the mounting pad and electrically connected to the semiconductor chip by a pattern arranged on the substrate, wherein the semiconductor chip includes a first terminal and a second terminal for inputting/outputting signals, the test terminal group includes a first test terminal electrically connected to the first terminal and a second test terminal electrically connected to the second terminal, a first voltage is applied to the first terminal and the second terminal, and a stress signal that is caused by a second voltage is applied to the first test terminal.Type: GrantFiled: December 15, 2016Date of Patent: November 26, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung Jun Song, Young Min Kim, Chang Su Kim, Han Gu Kim
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Patent number: 10318678Abstract: A three-dimensional optoelectrical simulation includes generating a process simulation result including a doping profile of a silicon substrate of image sensor, a structure simulation result with respect to a back end of line structure, and a merged result generated by merging a process simulation result and a structure simulation result, selectively extending the merged result to an extended result by using a process simulation result or a structure simulation result, generating a segmented result for each pixel based on a merged result or an extended result, an optical crosstalk simulation result of image sensor based on a structure simulation result and an optical mesh, and a final simulation result including an electrical crosstalk simulation result of the image sensor based on a segmented result for each pixel and an optical crosstalk simulation result.Type: GrantFiled: April 16, 2014Date of Patent: June 11, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Wook Lee, Han-Gu Kim, Young-Keun Lee, Jong-Sung Jeon
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Publication number: 20190173278Abstract: An electrostatic discharge (ESD) protection circuit is provided. The ESD protection circuit includes a transient-state detection circuit configured to generate a dynamic triggering signal based on a voltage change rate of a voltage on a first power rail; a voltage detection circuit configured to generate a static triggering signal based on the voltage on the first power rail; a trigger circuit configured to generate a discharge control signal based on the dynamic triggering signal and the static triggering signal; and a main discharge circuit configured to discharge an electric charge from the first power rail to a second power rail based on the discharge control signal.Type: ApplicationFiled: July 18, 2018Publication date: June 6, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-Pil JANG, Chang-Su KIM, Han-Gu KIM, Moon-Seok YANG, Kyoung-Ki JEON
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Patent number: 10211196Abstract: An electrostatic discharge (ESD) protection device includes an N-type laterally diffused metal oxide semiconductor (LDMOS) transistor including a source electrode, a gate electrode, and a well bias electrode that are connected to a first pad receiving a first voltage, and a drain electrode connected to a middle node. The ESD protection device further includes a silicon controlled rectifier (SCR) connected between the middle node and a second pad receiving a second voltage higher than the first voltage.Type: GrantFiled: August 11, 2016Date of Patent: February 19, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Hyok Ko, Min-Chang Ko, Han-Gu Kim, Jong-Kyu Song, Jin Heo
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Patent number: 10134723Abstract: In an ESD protection device, a first well of a first conductivity type and a second well of a second conductivity type are formed in a substrate to contact each other. A first impurity region of the first conductivity type and a second impurity region of the second conductivity type are formed in the first well, and are electrically connected to a first electrode pad. The second impurity region is spaced apart from the first impurity region in a direction of the second well. A third impurity region is formed in the second well, has the second conductivity type, and is electrically connected to a second electrode pad. A fourth impurity region is formed in the second well, is located in a direction of the first well from the third impurity region to contact the third impurity region, has the first conductivity type, and is electrically floated.Type: GrantFiled: September 19, 2017Date of Patent: November 20, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Hyok Ko, Han-Gu Kim, Jong-Kyu Song, Jin Heo
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Patent number: 10121776Abstract: A film-type semiconductor package includes a semiconductor integrated circuit and a dummy metal pattern. The semiconductor integrated circuit is formed on a film and includes an electrostatic discharge (ESD) protection circuit. The dummy metal pattern is formed on the film and is electrically connected to the ESD protection circuit through a first wiring formed on the film.Type: GrantFiled: November 30, 2016Date of Patent: November 6, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sung-Jun Song, Young-Min Kim, Chang-Su Kim, Han-Gu Kim
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Publication number: 20180195159Abstract: Provided is a method of manufacturing a zinc-plated steel sheet. The method includes: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; and zinc plating the annealed steel sheet by dipping in a molten zinc plating bath. Further provided is a method of manufacturing a hot-press part including: coating a metal on the steel sheet on a steel sheet; annealing the metal coated steel sheet; zinc plating the annealed steel sheet by dipping in a molten zinc plating bath; heating the zinc-plated steel sheet; and press forming the heated steel sheet.Type: ApplicationFiled: March 7, 2018Publication date: July 12, 2018Inventors: Il-Ryoung SOHN, Jong-Sang KIM, Joong-Chul PARK, Yeol-Rae CHO, Jin-Keun OH, Han-Gu CHO, Bong-Hoon CHUNG, Jong-Seog LEE
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Patent number: 10020231Abstract: In one embodiment, the semiconductor device includes at least one active fin protruding from a substrate, a first gate electrode crossing the active fin, and a first impurity region formed on the active fin at a first side of the first gate electrode. At least a portion of the first impurity region is formed in a first epitaxial layer portion on the active fin. A second impurity region is formed on the active fin at a second side of the first gate electrode. The second impurity region has at least a portion not formed in an epitaxial layer.Type: GrantFiled: February 27, 2017Date of Patent: July 10, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Chan-Hee Jeon, Eun-Kyoung Kwon, Il-Ryong Kim, Han-Gu Kim, Woo-Jin Seo, Ki-Tae Lee
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Patent number: 9945020Abstract: Provided is a zinc-plated steel sheet for hot pressing having outstanding surface characteristics, comprising: a steel foundation plate comprising a metal surface diffusion layer of which the Gibbs free energy reduction per mole of oxygen during oxidation is less than that of Cr, an aluminum-rich layer containing at least 30 wt. % of aluminum formed on the surface diffusion layer, and a zinc plating layer formed on the aluminum-rich layer. In this way, a metal having a low affinity for oxygen is coated to an effective thickness prior to annealing and thus the creation of annealing oxides at the surface of the steel sheet is suppressed and a uniform zinc plating layer is formed, and alloying of the zinc plating layer is promoted during press-processing heat treatment. Cracking in the steel foundation plate during hot press molding is prevented.Type: GrantFiled: May 4, 2015Date of Patent: April 17, 2018Assignee: POSCOInventors: Il-Ryoung Sohn, Jong-Sang Kim, Joong-Chul Park, Yeol-Rae Cho, Jin-Keun Oh, Han-Gu Cho, Bong-Hoon Chung, Jong-Seog Lee
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Publication number: 20180012883Abstract: In an ESD protection device, a first well of a first conductivity type and a second well of a second conductivity type are formed in a substrate to contact each other. A first impurity region of the first conductivity type and a second impurity region of the second conductivity type are formed in the first well, and are electrically connected to a first electrode pad. The second impurity region is spaced apart from the first impurity region in a direction of the second well. A third impurity region is formed in the second well, has the second conductivity type, and is electrically connected to a second electrode pad. A fourth impurity region is formed in the second well, is located in a direction of the first well from the third impurity region to contact the third impurity region, has the first conductivity type, and is electrically floated.Type: ApplicationFiled: September 19, 2017Publication date: January 11, 2018Inventors: Jae-Hyok Ko, Han-Gu Kim, Jong-Kyu Song, Jin Heo
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Patent number: 9817596Abstract: A non-volatile memory system and a method of managing the power of the same are provided. The non-volatile memory system includes a non-volatile memory configured to store a first mapping table comprising a list of a logical address and a physical address corresponding to the logical address with respect to a code region and a list of a logical address and a physical address corresponding to the logical address with respect to a general purpose (GP) region, and a controller configured to load the first mapping table from the non-volatile memory to a first memory and load the second mapping table from the non-volatile memory to a second memory. Power-up of the second memory is delayed with respect to power-up of the non-volatile memory system and the first or second memory is powered down if a condition is satisfied, so that power consumption of the non-volatile memory system is reduced.Type: GrantFiled: September 20, 2016Date of Patent: November 14, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Hyeon Ju, Young Joon Choi, Han Gu Sohn, Hyo Jin Jeong
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Patent number: 9799641Abstract: In an ESD protection device, a first well of a first conductivity type and a second well of a second conductivity type are formed in a substrate to contact each other. A first impurity region of the first conductivity type and a second impurity region of the second conductivity type are formed in the first well, and are electrically connected to a first electrode pad. The second impurity region is spaced apart from the first impurity region in a direction of the second well. A third impurity region is formed in the second well, has the second conductivity type, and is electrically connected to a second electrode pad. A fourth impurity region is formed in the second well, is located in a direction of the first well from the third impurity region to contact the third impurity region, has the first conductivity type, and is electrically floated.Type: GrantFiled: July 27, 2015Date of Patent: October 24, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Hyok Ko, Han-Gu Kim, Jong-Kyu Song, Jin Heo
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Patent number: 9790113Abstract: An apparatus includes a filtration skid configured to generate a filtrate through at least one of microfiltration and ultrafiltration. The apparatus further includes a desalination skid fluidly connected to the filtration skid. The desalination skid is configured to perform reverse osmosis desalination on the filtrate to generate a permeate, where the filtrate travels from the filtration skid to the desalination skid without traversing a storage tank. In one embodiment, the apparatus further comprises a controller, where the filtration skid and the desalination skid are integrated to provide self-adaptive operation of the filtration skid and the desalination skid in response to control by at least one of a supervisory controller and a local controller. In one embodiment, the control responds to at least one of temporal variability of feed water quality, a permeate production capacity target, and a permeate quality target.Type: GrantFiled: September 14, 2011Date of Patent: October 17, 2017Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Yoram Cohen, Panagiotis D. Christofides, Anditya Rahardianto, Alex R. Bartman, Aihua Zhu, Han Gu, Larry Xingming Gao
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Publication number: 20170209834Abstract: An apparatus includes 1) a filtration device including a filtration module to generate a filtrate from an input stream; 2) a desalination device fluidly connected to the filtration device; and 3) a controller configured to direct operation of the filtration device and the desalination device. In a first mode of operation, the filtration module is configured to perform filtration as part of generating the filtrate. In a second mode of operation, the filtration module is configured to receive an output from the desalination device such that the output backwashes the filtration module. The controller is configured to monitor a change in membrane resistance of the filtration module during the first mode of operation, and is configured to trigger the filtration module to enter the second mode of operation based on the change in membrane resistance.Type: ApplicationFiled: January 25, 2017Publication date: July 27, 2017Inventors: Yoram Cohen, Panagiotis D. Christofides, Han Gu, Larry Xingming Gao, Anditya Rahardianto