Patents by Inventor Han Jen
Han Jen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160093608Abstract: A semiconductor device is provided. The semiconductor device includes a first conductive portion on a first side of a first shallow trench isolation (STI) region. The first conductive portion is formed within a first well having a first conductivity type. The first conductive portion has the first conductivity type. The first conductive portion is connected to an electro static discharge (ESD) circuit. A second conductive portion is on a second side of the first STI region. The second conductive portion is formed within a second well having a second conductivity type. The second conductive portion having the first conductivity type is connected to a first nanowire and an input output I/O port.Type: ApplicationFiled: September 30, 2014Publication date: March 31, 2016Inventors: Li-Wei Chu, Bo-Ting Chen, Wun-Jie Lin, Han-Jen Yang
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Publication number: 20160079229Abstract: A semiconductor device is provided. The semiconductor device includes a first transistor on a first side of a shallow trench isolation (STI) region and a second transistor on a second side of the STI region. The first transistor includes a first conductive portion having a second conductivity type formed within a well having a first conductivity type, a first nanowire connected to the first conductive portion and a first active area, and a first gate surrounding the first nanowire. The second transistor includes a second conductive portion having the second conductivity type formed within the well, a second nanowire connected to the second conductive portion and a second active area, and a second gate surrounding the second nanowire. Excess current from an ESD event travels through the first conductive portion through the well to the second conductive portion bypassing the first nanowire and the second nanowire.Type: ApplicationFiled: September 11, 2014Publication date: March 17, 2016Inventors: Bo-Ting Chen, Li-Wei Chu, Wun-Jie Lin, Han-Jen Yang
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Publication number: 20160020334Abstract: The present invention provides a semiconductor structure, including a substrate, a gate dielectric layer disposed on the substrate, a charge storage layer disposed on the gate dielectric layer, and at least two poly silicon layers, disposed on the gate dielectric layer respectively, and covering parts of the charge storage layer simultaneously.Type: ApplicationFiled: September 11, 2014Publication date: January 21, 2016Inventor: Po-Han Jen
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Publication number: 20150380396Abstract: An Electro-Static Discharge (ESD) protection circuit includes a plurality of groups of p-type heavily doped semiconductor strips (p+ strips) and a plurality of groups of n-type heavily doped semiconductor strips (n+ strips) forming an array having a plurality of rows and columns. In each of the rows and the columns, the plurality of groups of p+ strips and the plurality of groups of n+ strips are allocated in an alternating layout. The ESD protection circuit further includes a plurality of gate stacks, each including a first edge aligned to an edge of a group in the plurality of groups of p+ strips, and a second edge aligned to an edge of a group in the plurality of groups of n+ strips.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Inventors: Yu-Ti Su, Wun-Jie Lin, Han-Jen Yang, Shui-Ming Cheng, Ming-Hsiang Song
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Patent number: 9147676Abstract: An Electro-Static Discharge (ESD) protection circuit includes a plurality of groups of p-type heavily doped semiconductor strips (p+ strips) and a plurality of groups of n-type heavily doped semiconductor strips (n+ strips) forming an array having a plurality of rows and columns. In each of the rows and the columns, the plurality of groups of p+ strips and the plurality of groups of n+ strips are allocated in an alternating layout. The ESD protection circuit further includes a plurality of gate stacks, each including a first edge aligned to an edge of a group in the plurality of groups of p+ strips, and a second edge aligned to an edge of a group in the plurality of groups of n+ strips.Type: GrantFiled: October 2, 2013Date of Patent: September 29, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Ti Su, Wun-Jie Lin, Han-Jen Yang, Shui-Ming Cheng, Ming-Hsiang Song
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Publication number: 20150091054Abstract: An Electro-Static Discharge (ESD) protection circuit includes a plurality of groups of p-type heavily doped semiconductor strips (p+ strips) and a plurality of groups of n-type heavily doped semiconductor strips (n+ strips) forming an array having a plurality of rows and columns. In each of the rows and the columns, the plurality of groups of p+ strips and the plurality of groups of n+ strips are allocated in an alternating layout. The ESD protection circuit further includes a plurality of gate stacks, each including a first edge aligned to an edge of a group in the plurality of groups of p+ strips, and a second edge aligned to an edge of a group in the plurality of groups of n+ strips.Type: ApplicationFiled: October 2, 2013Publication date: April 2, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Ti Su, Wun-Jie Lin, Han-Jen Yang, Shui-Ming Cheng, Ming-Hsiang Song
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Publication number: 20150084134Abstract: A semiconductor device includes semiconductor fins on semiconductor strips on a substrate. The semiconductor fins are parallel to each other. A gate stack is over the semiconductor fins, and a drain epitaxy semiconductor region is disposed laterally from a side of the gate stack and on the semiconductor strips. A first dielectric layer is over the substrate, and the first dielectric layer has a first metal layer. A second dielectric layer is over the first dielectric layer, and the second dielectric layer has a second metal layer. Vias extend from the second metal layer and through the first dielectric layer, and the vias are electrically coupled to the drain epitaxy semiconductor region.Type: ApplicationFiled: November 26, 2014Publication date: March 26, 2015Inventors: Wun-Jie Lin, Ching-Hsiung Lo, Jen-Chou Tseng, Han-Jen Yang, Arabinda Das
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Publication number: 20140313344Abstract: An image capturing device includes a lens module, a filter, two sensors, a first image processing module, and a second image processing module. The lens module is adapted to receive the image beam. The filter is adapted to split the image beam into a first beam and a second beam. The two sensors are disposed in transmission paths of the first beam and the second beam separately, and the sensors separately convert the first beam and the second beam into a first optical information and a second optical information. The first image processing module and the second image processing module are disposed in transmission paths of the first optical information and the second optical information separately, and the image processing modules separately convert the optical information into image information. The second image processing module integrates the first image information and the second image information into a color image.Type: ApplicationFiled: July 2, 2014Publication date: October 23, 2014Applicant: Young Optics Inc.Inventors: Kai-Hsiang Tsao, Han-Jen Pai
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Patent number: 8665378Abstract: A filter for a video stream is provided. The filter generates a filtered picture according to a current picture and its previous picture. A motion difference calculator accumulates differences between current picture values and previous picture values within a neighborhood of each pixel to provide a corresponding motion difference. A histogram counter performs histogram counting according to motion differences of the pixels. A filter value calculator provides a filter value for each pixel according to operations of the motion difference calculator and the histogram counter. A blender blends the current picture value and the previous picture value of each pixel according to weightings correlated to the filter value, and provides a filtered picture value for each pixel of the filtered picture.Type: GrantFiled: September 23, 2011Date of Patent: March 4, 2014Assignee: MStar Semiconductor, Inc.Inventors: Han-Jen Hsu, Wei-Kuo Lee
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Publication number: 20130009660Abstract: An electrical connecting device is provided. The electrical connecting device comprises at least one jig for electrically connecting and clamping at least one electrode of at least one electrical component. The jig comprises a first clamping portion, a second clamping portion and a first detecting elastic sheet. The second clamping portion is disposed opposite to the first clamping portion. The electrode is adapted to be electrically connected to and clamped between the first clamping portion and the second clamping portion. The first detecting elastic sheet is fixed with the first clamping portion. The first detecting elastic sheet is connected to a first sensor and formed with a first contact portion. The first sensor is used for sensing a first parameter of the electrical component and the first contact portion is used for contacting the electrode.Type: ApplicationFiled: July 6, 2012Publication date: January 10, 2013Applicant: CHROMA ATE INC.Inventors: Chiang-Cheng FAN, Mao-Sheng LIU, Li-Shou CHEN, Hsi-Ping TSAI, Han-Jen TSENG
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Publication number: 20120257113Abstract: A filter for a video stream is provided. The filter generates a filtered picture according to a current picture and its previous picture. A motion difference calculator accumulates differences between current picture values and previous picture values within a neighborhood of each pixel to provide a corresponding motion difference. A histogram counter performs histogram counting according to motion differences of the pixels. A filter value calculator provides a filter value for each pixel according to operations of the motion difference calculator and the histogram counter. A blender blends the current picture value and the previous picture value of each pixel according to weightings correlated to the filter value, and provides a filtered picture value for each pixel of the filtered picture.Type: ApplicationFiled: September 23, 2011Publication date: October 11, 2012Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Han-Jen Hsu, Wei-Kuo Lee
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Patent number: 8259818Abstract: A deblocking apparatus is provided. The deblocking apparatus includes a filter, a blocking detection module and a blending unit. The filter receives a target pixel of a pixel matrix to generate a filtered target pixel. The blocking detection module generates a deblocking intensity factor according to the pixel matrix. The blending unit receives the target pixel and the filtered target pixel, and dynamically blends the target pixel and the filtered target pixel to output an output pixel according to the deblocking intensity factor.Type: GrantFiled: October 21, 2009Date of Patent: September 4, 2012Assignee: Mstar Semiconductor, Inc.Inventors: Han-Jen Hsu, Wei-Kuo Lee
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Patent number: 8103376Abstract: The present invention provides a system and method for the on-machine 2-D contour measurement, employing the contour measurement, coordinate system transformation, error identification, and image matching theory in image processing field to develop the on-machine measurement of X-Y-plan manufacturing error of a micro device manufactured by a high-precision micro-device machine tool, contour error, and trace error.Type: GrantFiled: September 5, 2008Date of Patent: January 24, 2012Assignee: Chung Yuan Christian UniversityInventors: Shih-Ming Wang, Han-Jen Yu
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Patent number: 8018997Abstract: A video encoding method and system are provided for encoding a video sequence. The video sequence includes N sub-sequences which each includes a plurality of frames. When the video encoding system encodes the jth frame in the ith sub-sequence of the video sequence, the frames previous to the jth frame in the ith sub-sequence have been encoded. Based on the encoded frames, an initial quantization scale is generated. According to the initial quantization scale, the jth frame of the ith sub-sequence is encoded in the inter-encoded mode. Whether the jth frame in the ith sub-sequence is a “scene change” relative to the (j?1)th frame in the ith subsequence is judged, and if YES, based on the initial quantization scale, an adjusted quantization scale is generated. Moreover, the jth frame in the ith sub-sequence is re-encoded in accordance with the adjusted quantization scale.Type: GrantFiled: December 8, 2005Date of Patent: September 13, 2011Assignee: Quanta Computer Inc.Inventors: Han-Jen Chang, Wei-Min Chao
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Patent number: 7929155Abstract: The present invention provides a method and system for on-machine 3-D depth measurement. The same image retrieving apparatus measures the first distance for the width of the similar gray-level region of cutting-surface from the first angle, and measures the second distance for the width of the similar gray-level region of cutting-surface from the first angle superimposing the second angle. The width of the similar gray-level region of cutting-surface comprises the cutting-surface and the shadow of the bottom portion of the cutting-surface. And then the cutting-surface depth is calculated according to the first angle, the second angle, the first distance, and the second distance.Type: GrantFiled: September 5, 2008Date of Patent: April 19, 2011Assignee: Chung Yuan Christian UniversityInventors: Shih-Ming Wang, Han-Jen Yu
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Publication number: 20110013704Abstract: A deblocking apparatus is provided. The deblocking apparatus includes a filter, a blocking detection module and a blending unit. The filter receives a target pixel of a pixel matrix to generate a filtered target pixel. The blocking detection module generates a deblocking intensity factor according to the pixel matrix. The blending unit receives the target pixel and the filtered target pixel, and dynamically blends the target pixel and the filtered target pixel to output an output pixel according to the deblocking intensity factor.Type: ApplicationFiled: October 21, 2009Publication date: January 20, 2011Applicant: MStar Semiconductor, Inc.Inventors: Han-Jen Hsu, Wei-Kuo Lee
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Publication number: 20100315511Abstract: An image capturing device includes a lens module, a filter, two sensors, a first image processing module, and a second image processing module. The lens module is adapted to receive the image beam. The filter is adapted to split the image beam into a first beam and a second beam. The two sensors are disposed in transmission paths of the first beam and the second beam separately, and the sensors separately convert the first beam and the second beam into a first optical information and a second optical information. The first image processing module and the second image processing module are disposed in transmission paths of the first optical information and the second optical information separately, and the image processing modules separately convert the optical information into image information. The second image processing module integrates the first image information and the second image information into a color image.Type: ApplicationFiled: June 4, 2010Publication date: December 16, 2010Applicant: YOUNG OPTICS INC.Inventors: Kai-Hsiang Tsao, Han-Jen Pai
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Patent number: 7800665Abstract: An image processing method is provided. A digital image is outputted by an optical sensor and includes M pixels. The ith pixel among the M pixels has an ith set of original gray levels, wherein i is an integer index ranging from 1 to M. In the method according to this invention, M sets of logarithm values are first generated. The ith set of logarithm values among the M sets of logarithm values is generated based on the ith set of original gray levels and a set of adjusting parameters relative to the optical sensor. Statistics of the M sets of logarithm values is then gathered. According to the statistics result, a target color temperature of the digital image is determined.Type: GrantFiled: September 12, 2007Date of Patent: September 21, 2010Assignee: Quanta Computer Inc.Inventor: Han-Jen Chang
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Publication number: 20100063612Abstract: The present invention provides a system and method for the on-machine 2-D contour measurement, employing the contour measurement, coordinate system transformation, error identification, and image matching theory in image processing field to develop the on-machine measurement of X-Y-plan manufacturing error of a micro device manufactured by a high-precision micro-device machine tool, contour error, and trace error.Type: ApplicationFiled: September 5, 2008Publication date: March 11, 2010Applicant: CHUNG YUAN CHRISTIAN UNIVERSITYInventors: Shih-Ming Wang, Han-Jen Yu
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Publication number: 20100060907Abstract: The present invention provides a method and system for on-machine 3-D depth measurement. The same image retrieving apparatus measures the first distance for the width of the similar gray-level region of cutting-surface from the first angle, and measures the second distance for the width of the similar gray-level region of cutting-surface from the first angle superimposing the second angle. The width of the similar gray-level region of cutting-surface comprises the cutting-surface and the shadow of the bottom portion of the cutting-surface. And then the cutting-surface depth is calculated according to the first angle, the second angle, the first distance, and the second distance.Type: ApplicationFiled: September 5, 2008Publication date: March 11, 2010Applicant: CHUNG YUAN CHRISTIAN UNIVERSITYInventors: Shih-Ming Wang, Han-Jen Yu