Abstract: The present invention provides a manufacturing method of an array substrate, comprising steps of: forming a gate and a gate line on a substrate; forming a gate insulating layer on the gate and the gate line; forming a pixel electrode on the gate insulating layer; and forming a first connecting via in a portion of the gate insulating layer in a non-display region and corresponding to the gate line, wherein the first connecting via is configured to connect a scanning signal trace to the gate line.

Abstract: The present invention provides a manufacturing method of an array substrate, comprising steps of: forming a gate and a gate line on a substrate; forming a gate insulating layer on the gate and the gate line; forming a pixel electrode on the gate insulating layer; and forming a first connecting via in a portion of the gate insulating layer in a non-display region and corresponding to the gate line, wherein the first connecting via is configured to connect a scanning signal trace to the gate line.

Abstract: A high-voltage FinFET device having LDMOS structure and a method for manufacturing the same are provided. The high-voltage FinFET device includes: at least one fin structure, a working gate, a shallow trench isolation structure, and a first dummy gate. The fin structure includes a first-type well region and a second-type well region adjacent to the first-type well region, and further includes a first part and a second part. A trench is disposed between the first part and the second part and disposed in the first-type well region. A drain doped layer is disposed on the first part which is disposed in the first-type well region, and a source doped layer is disposed on the second part which is disposed in the second-type well region. The working gate is disposed on the fin structure which is disposed in the first-type well region and in the second-type well region.

Abstract: A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a first gate structure, a second gate structure and a second dielectric spacer. Each of the first gate structure and the second gate structure adjacent to each other includes a first dielectric spacer. The second dielectric spacer is on one of opposing sidewalls of the first gate structure and without being disposed on the dielectric spacer of the second gate structure.

Abstract: A method of managing a call center that includes a plurality of agents may include receiving functional data associated with the plurality of call center agents over a time period, for each data curve, normalizing the data points to create a plurality of normalized functional data points, determining a variation associated with each normalized functional data point, determining one or more threshold values associated with each normalized functional data point, determining whether one or more of the normalized functional data points have a value that exceeds the associated threshold value, and identifying each of the normalized functional data points having a value that exceeds the associated threshold value as an outlier. The method may include identifying the call center agent associated with each curve that has an outlier and presenting information pertaining to one or more identified call center agents to a user.

Abstract: A method for deriving characteristic values of a MOS transistor is described. A set of ?k values is provided. A set of VBi values (i=1 to M, M?3) is provided. A set of RSDi,j (i=1 to M?1, j=i+1 to M) values each under a pair of VBi and VBj, or a set of Vtq—q,j (q is one of 1 to M, j is 1 to M excluding q) values under VBq is derived for each ?k, with an iteration method. The ?k value making the set of RSDi,j values or Vtq—q,j values closest to each other is determined as an accurate ?k value. The mean value of RSDi,j at the accurate ?k value is calculated as an accurate RSD value.

Abstract: Provided is a method of fabricating a MOS device including the following steps. At least one gate structure is formed on a substrate, wherein the gate structure includes a gate conductive layer and a hard mask layer disposed on the gate conductive layer. A first implant process is performed to form source and drain extension regions in the substrate, wherein the gate conductive layer is covered by the hard mask layer. A process is of removing the hard mask layer is performed to expose the surface of the gate conductive layer. A second implant process is performed to form pocket doped regions in the substrate, wherein the gate conductive layer is not covered by the hard mask layer.

Abstract: A method of managing a call center that includes a plurality of agents may include receiving functional data associated with the plurality of call center agents over a time period, for each data curve, normalizing the data points to create a plurality of normalized functional data points, determining a variation associated with each normalized functional data point, determining one or more threshold values associated with each normalized functional data point, determining whether one or more of the normalized functional data points have a value that exceeds the associated threshold value, and identifying each of the normalized functional data points having a value that exceeds the associated threshold value as an outlier. The method may include identifying the call center agent associated with each curve that has an outlier and presenting information pertaining to one or more identified call center agents to a user.

Abstract: A system implements a method of assessing performance of a call center agent that includes identifying a set of the one-time caller calls that the agent has handled. A first issue resolution rate is determined for the calls in the set that were released by the customer, and a second issue resolution rate is determined for the calls in the set that were released by the call center agent. The method also includes determining a difference between the first issue resolution rate and the second issue resolution rate. The determined difference is used to generate a performance assessment for the call center agent.

Abstract: Provided is a method of fabricating a MOS device including the following steps. At least one gate structure is formed on a substrate, wherein the gate structure includes a gate conductive layer and a hard mask layer disposed on the gate conductive layer. A first implant process is performed to form source and drain extension regions in the substrate, wherein the gate conductive layer is covered by the hard mask layer. A process is of removing the hard mask layer is performed to expose the surface of the gate conductive layer. A second implant process is performed to form pocket doped regions in the substrate, wherein the gate conductive layer is not covered by the hard mask layer.

Abstract: A system implements a method of assessing performance of a call center agent that includes identifying a set of the one-time caller calls that the agent has handled. A first issue resolution rate is determined for the calls in the set that were released by the customer, and a second issue resolution rate is determined for the calls in the set that were released by the call center agent. The method also includes determining a difference between the first issue resolution rate and the second issue resolution rate. The determined difference is used to generate a performance assessment for the call center agent.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate having a first gate structure and a second gate structure formed thereon; blanketly forming a seal layer covering the first gate structure and the second gate structure on the substrate; performing a first ion implantation to form first light-doped drains (LDDs) in the substrate respectively at two sides of the first gate structure; and performing a second ion implantation to form second LDDs in the substrate respectively at two sides of the second gate structure; wherein at least one of the first ion implantation and the second ion implantation is performed to penetrate through the seal layer.