Patents by Inventor Hanhong Xue
Hanhong Xue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10379883Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: GrantFiled: August 13, 2014Date of Patent: August 13, 2019Assignee: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Patent number: 10360050Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: GrantFiled: January 17, 2014Date of Patent: July 23, 2019Assignee: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Patent number: 9606837Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.Type: GrantFiled: October 31, 2014Date of Patent: March 28, 2017Assignee: International Business Machines CorporationInventors: Wen C. Chen, Tsai-Yang Jea, Wiliam P. LePera, Hung Q. Thai, Hanhong Xue, Zhi Zhang
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Patent number: 9503383Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.Type: GrantFiled: April 17, 2015Date of Patent: November 22, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uman Chan, Deryck X. Hong, Tsai-Yang Jea, Chulho Kim, Zenon J. Piatek, Hung Q. Thai, Abhinav Vishnu, Hanhong Xue
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Patent number: 9495217Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.Type: GrantFiled: July 29, 2014Date of Patent: November 15, 2016Assignee: International Business Machines CorporationInventors: Wen C. Chen, Tsai-Yang Jea, Wiliam P. LePera, Hung Q. Thai, Hanhong Xue, Zhi Zhang
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Patent number: 9430297Abstract: Load balancing of adapters on a multi-adapter node of a communications environment. A task executing on the node selects an adapter resource unit to be used as its primary port for communications. The selection is based on the task's identifier, and facilitates a balancing of the load among the adapter resource units. Using the task's identifier, an index is generated that is used to select a particular adapter resource unit from a list of adapter resource units assigned to the task. The generation of the index is efficient and predictable.Type: GrantFiled: December 15, 2008Date of Patent: August 30, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hung Q. Thai, Hanhong Xue
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Publication number: 20160034313Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.Type: ApplicationFiled: October 31, 2014Publication date: February 4, 2016Inventors: Wen C. Chen, Tsai-Yang Jea, Wiliam P. LePera, Hung Q. Thai, Hanhong Xue, Zhi Zhang
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Publication number: 20160034312Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.Type: ApplicationFiled: July 29, 2014Publication date: February 4, 2016Inventors: Wen C. Chen, Tsai-Yang Jea, Wiliam P. LePera, Hung Q. Thai, Hanhong Xue, Zhi Zhang
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Patent number: 9250948Abstract: A parallel computer executes a number of tasks, each task includes a number of endpoints and the endpoints are configured to support collective operations. In such a parallel computer, establishing a group of endpoints receiving a user specification of a set of endpoints included in a global collection of endpoints, where the user specification defines the set in accordance with a predefined virtual representation of the endpoints, the predefined virtual representation is a data structure setting forth an organization of tasks and endpoints included in the global collection of endpoints and the user specification defines the set of endpoints without a user specification of a particular endpoint; and defining a group of endpoints in dependence upon the predefined virtual representation of the endpoints and the user specification.Type: GrantFiled: September 13, 2011Date of Patent: February 2, 2016Assignee: International Business Machines CorporationInventors: Charles J. Archer, Michael A. Blocksome, Joseph D. Ratterman, Brian E. Smith, Hanhong Xue
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Patent number: 9189266Abstract: Methods, apparatuses, and computer program products for responding to a timeout of a message in a parallel computer are provided. The parallel computer includes a plurality of compute nodes operatively coupled for data communications over one or more data communications networks. Each compute node includes one or more tasks. Embodiments include a first task of a first node sending a message to a second task on a second node. Embodiments also include the first task sending to the second node a command via a parallel operating environment (POE) in response to a timeout of the message. The command instructs the second node to perform a timeout motivated operation.Type: GrantFiled: March 13, 2013Date of Patent: November 17, 2015Assignee: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, Gary J. Mincher, Hanhong Xue
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Patent number: 9146771Abstract: Methods, apparatuses, and computer program products for responding to a timeout of a message in a parallel computer are provided. The parallel computer includes a plurality of compute nodes operatively coupled for data communications over one or more data communications networks. Each compute node includes one or more tasks. Embodiments include a first task of a first node sending a message to a second task on a second node. Embodiments also include the first task sending to the second node a command via a parallel operating environment (POE) in response to a timeout of the message. The command instructs the second node to perform a timeout motivated operation.Type: GrantFiled: March 12, 2013Date of Patent: September 29, 2015Assignee: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, Gary J. Mincher, Hanhong Xue
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Patent number: 9104501Abstract: A job may be divided into multiple tasks that may execute in parallel on one or more compute nodes. The tasks executing on the same compute node may be coordinated using barrier synchronization. However, to perform barrier synchronization, the tasks use (or attach) to a barrier synchronization register which establishes a common checkpoint for each of the tasks. A leader task may use a shared memory region to publish to follower tasks the location of the barrier synchronization register—i.e., a barrier synchronization register ID. The follower tasks may then monitor the shared memory to determine the barrier synchronization register ID. The leader task may also use a count to ensure all the tasks attach to the BSR. This advantageously avoids any task-to-task communication which may reduce overhead and improve performance.Type: GrantFiled: December 7, 2012Date of Patent: August 11, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, William P. Lepera, HanHong Xue, Zhi Zhang
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Publication number: 20150222556Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.Type: ApplicationFiled: April 17, 2015Publication date: August 6, 2015Inventors: UMAN CHAN, DERYCK X. HONG, TSAI-YANG JEA, CHULHO KIM, ZENON J. PIATEK, HUNG Q. THAI, ABHINAV VISHNU, HANHONG XUE
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Patent number: 9092272Abstract: A job may be divided into multiple tasks that may execute in parallel on one or more compute nodes. The tasks executing on the same compute node may be coordinated using barrier synchronization. However, to perform barrier synchronization, the tasks use (or attach) to a barrier synchronization register which establishes a common checkpoint for each of the tasks. A leader task may use a shared memory region to publish to follower tasks the location of the barrier synchronization register—i.e., a barrier synchronization register ID. The follower tasks may then monitor the shared memory to determine the barrier synchronization register ID. The leader task may also use a count to ensure all the tasks attach to the BSR. This advantageously avoids any task-to-task communication which may reduce overhead and improve performance.Type: GrantFiled: December 8, 2011Date of Patent: July 28, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, William P. LePera, Hanhong Xue, Zhi Zhang
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Publication number: 20150205625Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: ApplicationFiled: August 13, 2014Publication date: July 23, 2015Inventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Publication number: 20150205888Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: ApplicationFiled: January 17, 2014Publication date: July 23, 2015Applicant: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Patent number: 9049112Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.Type: GrantFiled: April 5, 2013Date of Patent: June 2, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uman Chan, Deryck X. Hong, Tsai-Yang Jea, Chulho Kim, Zenon J. Piatek, Hung Q. Thai, Abhinav Vishnu, Hanhong Xue
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Patent number: 8959528Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: GrantFiled: March 13, 2013Date of Patent: February 17, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
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Patent number: 8954991Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: GrantFiled: March 14, 2013Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
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Publication number: 20140282612Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue