Abstract: A distributed data processing system includes: (1) a first node with a processor, a first memory, and asynchronous memory mover logic; and connection mechanism that connects (2) a second node having a second memory. The processor includes processing logic for completing a cross-node asynchronous memory move (AMM) operation, wherein the processor performs a move of data in virtual address space from a first effective address to a second effective address, and the asynchronous memory mover logic completes a physical move of the data from a first memory location in the first memory having a first real address to a second memory location in the second memory having a second real address. The data is transmitted via the connection mechanism connecting the two nodes independent of the processor.

Abstract: A target task ensures complete delivery of a global shared memory (GSM) message from an originating task to the target task. The target task's HFI receives a first of multiple GSM packets generated from a single GSM message sent from the originating task. The HFI logic assigns a sequence number and corresponding tuple to track receipt of the complete GSM message. The sequence number is unique relative to other sequence numbers assigned to GSM messages that have not been completely received from the initiating task. The HFI updates a count value within the tuple, which comprises the sequence number and the count value for the first GSM packet and for each subsequent GSM packet received for the GSM message. The HFI determines when receipt of the GSM message is complete by comparing the count value with a count total retrieved from the packet header.

Abstract: An instruction set architecture (ISA) includes an asynchronous memory move (AMM) synchronization (SYNC) instruction. When processor of a data processing system executes the AMM SYNC instruction, the processor prevents an AMM operation generated by a subsequently received/executed AMM ST instruction from proceeding with the data move portion of the AMM operation within the memory subsystem until completion of all ongoing memory access operations within the memory subsystem and fabric. The AMM operation does not wait for a normal barrier operation. The processor forwards the information relevant to initiate the AMM operation to an asynchronous memory mover logic, and signals the logic to not proceed with the AMM operation until signaled of the completion of the AMM SYNC.

Abstract: A data processing system includes a mechanism for completing an asynchronous memory move (AMM) operation in which the processor receives an AMM ST instruction and processes a processor-level move of data in virtual address space and an asynchronous memory mover then completes a physical move of the data within the real address space (memory). A status/control field of the AMM ST instruction includes an indication of a requested treatment of the lower level cache(s) on completion of the AMM operation. When the status/control field indicates an update to at least one cache should be performed, the asynchronous memory mover automatically forwards a copy of the data from the data move to the lower level cache, and triggers an update of a coherency state for a cache line in which the copy of the data is placed.

Abstract: A method performed in a data processing system initiates an asynchronous memory move (AMM) operation, whereby a processor performs a move of data in virtual address space from a first effective address to a second effective address and forwards parameters of the AMM operation to asynchronous memory mover logic for completion of the physical movement of data from a first memory location to a second memory location. The processor executes a second operation, which checks a status of the completion of the data move and returns a notification indicating the status. The notification indicates a status, which includes one of: data move in progress; data move totally done; data move partially done; data move cannot be performed; and occurrence of a translation look-aside buffer invalidate entry (TLBIE) operation. The processor initiates one or more actions in response to the notification received.

Abstract: A method and a data processing system for completing checkpoint processing of a distributed job with local tasks communicating with other remote tasks via a host fabric interface (HFI) and assigned HFI window. Each HFI window has a send count and a receive count, which tracks GSM messages that are sent from and received at the HFI window. When a checkpoint is initiated by a master task, each local task forwards the send count and the receive count to the master task. The master task sums the respective counts and then compares the totals to each other. When the send count total is equal to the receive count total, the tasks are permitted to continue processing. However, when the send count total is not equal to the receive count total, the master task notifies each task of the job to rollback to a previous checkpoint or kill the job execution.

Abstract: A protocol interface is provided for an active message protocol of a computing environment and a client process employing the active message protocol. The protocol interface includes an interface to a header handler function associated with the client process. The interface to the header handler function has parameters to be passed by and a parameter to be returned to the active message protocol when processing a message received through the active message protocol. The parameters to be passed include current message state information and current message type information for the received message. These parameters facilitate message-specific decisions by the header handler function about processing data of the message by the active message protocol. The parameter to be returned to the active message protocol instructs the active message protocol how to process the received message other than just where to store the message.

Abstract: A method and system for transferring noncontiguous messages group including assembling a set of data into a series of transmission packets, packaging a description of the layout of the transmission packets into description packets and then places each description packet into a local buffer while maintaining a count of the number of description packets, transfers each description packet into a transmit buffer for transmission to at least one receiving node, identifies the data packets, and forwards each data packet to the transmit buffer for transmission to the at least one receiving node. The receiving node receives the transmission packets, identifies each packet as a description packet or data packet, places the description packets in a local buffer for storage until the description is complete, places each description packet into a user data buffer, stores data packets in a local queue until the description is complete, then transfers the data packets to the user buffer.

Abstract: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with the target processor is found in a processor cache of the target processor. If it is determined that the memory address is found in a target processor's cache, the data will be directly written to that cache at the same time that the data is being provided to a location in main memory.

Abstract: A barrier synchronization register, accessible to the nodes in a distributed data processing system, has portions thereof allotted to threads which are present in multiple groups. The barrier synchronization register portion allotted to a given thread has stored therein, over time, group identifier numbers. In this way the state space of a barrier synchronization register is shared over more than one group of process threads.

Abstract: A method is provided for sharing and/or transporting data within a single node of a multi-node data processing. The method avoids the necessity of making more than one copy of the data to be shared or transported. The method is tunable based on the size of the data segment involved. A shared memory area between tasks running in different address spaces on the node is used to coordinate the process and for task to task communication. The increase in efficiency provided by the intranodal process described herein also provides advantages to the internodal communication process since more CPU cycles are available for that aspect of system operation.

Abstract: Lock-free queues of a shared memory environment are used to facilitate communication within that environment. The lock-free queues can be used for interprocess communication, as well as intraprocess communication. The lock-free queues are structured to minimize the use of atomic operations when performing operations on the queues, and to minimize the number of enqueue/dequeue operations to be performed on the queues.

Abstract: A method is provided for transferring data between first and second nodes of a network. Such method includes requesting first data to be transferred by a first upper layer protocol (ULP) operating on the first node of the network; and buffering second data for transfer to the second node by a lower protocol layer lower than the first ULP, the second data including an integral number of standard size units of data including the first data. The method further includes posting the second data to the network for delivery to the second node; receiving the second data at the second node; and from the received data, delivering the first data to a second ULP operating on the second node. The method is of particular application when transferring the data in unit size is faster than transferring the data in other than unit size.

Abstract: A method and system for transferring noncontiguous messages group including assembling a set of data into a series of transmission packets, packaging a description of the layout of the transmission packets into description packets and then places each description packet into a local buffer while maintaining a count of the number of description packets, transfers each description packet into a transmit buffer for transmission to at least one receiving node, identifies the data packets, and forwards each data packet to the transmit buffer for transmission to the at least one receiving node. The receiving node receives the transmission packets, identifies each packet as a description packet or data packet, places the description packets in a local buffer for storage until the description is complete, places each description packet into a user data buffer, stores data packets in a local queue until the description is complete, then transfers the data packets to the user buffer.

Abstract: In a multinode data processing system in which nodes exchange information over a network or through a switch, a structure and mechanism are provided which enables data packets to be sent and received in any order. Normally, if in-order transmission and receipt are required, then transmission over a single path is essential to insure proper reassembly. However, the present mechanism avoids this necessity and permits Remote Direct Memory Access (RDMA) operations to be carried out simultaneously over multiple paths. This provides a data striping mode of operation in which data transfers can be carried out much faster since packets of single or multiple RDMA messages can be portioned and transferred over several paths simultaneously, thus providing the ability to utilize the full system bandwidth that is available.

Abstract: A protocol interface is provided for an active message protocol of a computing environment and a client process employing the active message protocol. The protocol interface includes an interface to a header handler function associated with the client process. The interface to the header handler function has parameters to be passed by and a parameter to be returned to the active message protocol when processing a message received through the active message protocol. The parameters to be passed include current message state information and current message type information for the received message. These parameters facilitate message-specific decisions by the header handler function about processing data of the message by the active message protocol. The parameter to be returned to the active message protocol instructs the active message protocol how to process the received message other than just where to store the message.

Abstract: Shared locks are employed for controlling a thread which extends across more than one protocol layer in a data processing system. The use of a counter is used as part of a data structure which makes it possible to implement shared locks across multiple layers. The use of shared locks avoids the processing overhead usually associated with lock acquisition and release. The thread which is controlled may be initiated in either an upper layer protocol or in a lower layer.

Abstract: Lock-free queues of a shared memory environment are used to facilitate communication within that environment. The lock-free queues can be used for interprocess communication, as well as intraprocess communication. The lock-free queues are structured to minimize the use of atomic operations when performing operations on the queues, and to minimize the number of enqueue/dequeue operations to be performed on the queues.

Abstract: A communication system with a communications adapter operating in an interrupt mode, the system comprising: a network system with at least one sender and a recipient of a message and a network for communication therebetween; the communications adapter placing data from the message in a receive buffer and generating an interrupt; and a state variable configured to track received messages. A method for increasing bandwidth in an interrupt mode processing protocol comprising: creating a state variable configured to track received messages; incrementing the state variable only if the received message exhibits multiple packets; decrementing the state variable if the received message exhibits multiple packets and completes; and generating an interrupt, with a communications adapter running in an interrupt mode, the communications adapter placing data from received message in a receive buffer.

Abstract: A method is provided for sharing and/or transporting data within a single node of a multi-node data processing. The method avoids the necessity of making more than one copy of the data to be shared or transported. The method is tunable based on the size of the data segment involved. A shared memory area between tasks running in different address spaces on the node is used to coordinate the process and for task to task communication. The increase in efficiency provided by the intranodal process described herein also provides advantages to the internodal communication process since more CPU cycles are available for that aspect of system operation.