Abstract: A wearable heart sound detection device includes an acoustic sensing device for collecting heart sound signals of user's body. A wireless transmission device is connected to transmit and receive data, an e-SIM embedded in the wearable heart sound detection device, wherein said acoustic sensing device includes a capacitive sound sensor, a piezoelectric sound sensor or the combination thereof. A circuit assembly electrically is connected with the capacitive sound sensor or said piezoelectric sound sensor, wherein the capacitive sound sensor and the piezoelectric sound sensor are integrated on a flexible substrate. The e-SIM is compatible with a wireless transmission protocol selected from a group of WiFi, 4G, 5G, 6G or any combination thereof.

Abstract: A method of forming a semiconductor device includes the following operations. A substrate is provided with a recess therein. An insulating layer is formed on a bottom of the recess. A seed layer is formed on the insulating layer. An epitaxial layer is grown in the recess from the seed layer.

Abstract: The present disclosure generally relates to novel multiple target inhibitor of tyrosine kinases (TKs) which can suppress angiogenesis, metastasis, oncogenesis, and/or immune regulation activities by inhibiting TKs and have very potent immunomodulatory activity. The present disclosure also relates to a method of using the tyrosine kinase inhibitors, alone or in combination with HDAC inhibitor, for the treatment of cancers, in particular in cancer immunotherapy, by regulating the tumor microenvironment, including reducing tumor hypoxia, reducing lactic acid accumulation, activating CTL, inhibiting the number and activity of immunosuppressive cells, finally obtaining superior anti-cancer benefits and/or producing lasting immune memory.

Abstract: Semiconductor devices and methods of manufacturing semiconductor devices are described herein. A method includes implanting neutral elements into a dielectric layer, an etch stop layer, and a metal feature, the dielectric layer being disposed over the etch stop layer and the metal feature being disposed through the dielectric layer and the etch stop layer. The method further includes using a germanium gas as a source for the neutral elements and using a beam current above 6.75 mA to implant the neutral elements.

Abstract: A memory cell structure includes a transistor structure and a capacitor structure, where the capacitor structure includes a hydrogen absorption layer. The hydrogen absorption layer absorbs hydrogen, which prevents or reduces the likelihood of the hydrogen diffusing into an underlying metal-oxide channel of the transistor structure. In this way, the hydrogen absorption layer minimizes and/or reduces the likelihood of hydrogen contamination in the metal-oxide channel, which may enable a low current leakage to be achieved for the memory cell structure and reduces the likelihood of data corruption and/or failure of the memory cell structure, among other examples.

Abstract: A method includes forming a source/drain region, forming a dielectric layer over the source/drain region, and etching the dielectric layer to form a contact opening. The source/drain region is exposed to the contact opening. The method further includes depositing a dielectric spacer layer extending into the contact opening, etching the dielectric spacer layer to form a contact spacer in the contact opening, implanting a dopant into the source/drain region through the contact opening after the dielectric spacer layer is deposited, and forming a contact plug to fill the contact opening.

Abstract: A method includes forming a metallic feature, forming an etch stop layer over the metallic feature, implanting the metallic feature with a dopant, forming a dielectric layer over the etch stop layer, performing a first etching process to etch the dielectric layer and the etch stop layer to form a first opening, performing a second etching process to etch the metallic feature and to form a second opening in the metallic feature, wherein the second opening is joined with the first opening, and filling the first opening and the second opening with a metallic material to form a contact plug.

Abstract: Various solutions for channel information feedback with prior information with respect to user equipment and network apparatus in mobile communications are described. An apparatus may receive a reference signal transmitted by a network side including at least one network node. The apparatus may obtain at least one selected basis. The apparatus may derive a channel response information observed by a receiving domain of the apparatus according to the reference signal. The apparatus may decompose the channel response information into a preferred domain. The apparatus may determine a simplified linear combination coefficient representation of the channel response information in the preferred domain according to the selected basis. The apparatus May report a compressed channel information to the network side based on the simplified linear combination coefficient representation and the preferred domain.

Abstract: A defect inspection system is disclosed, and comprises a linear light source, N number of cameras, a display device, a tag reader, and a modular electronic device, in which the linear light source, the cameras and the modular electronic device are used for conducting a defect inspection of an article. On the other hand, the display device, the tag reader and the modular electronic device are adopted for conducting in production of at least one labeled example. Therefore, the modular electronic device is allowed to apply a machine learning process to an image classifier under using a training dataset containing the labeled examples, thereby producing at least one new defect recognition model or updating the existing defect recognition model.

Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.

Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.

Abstract: A method includes forming a source/drain region, forming a dielectric layer over the source/drain region, and etching the dielectric layer to form a contact opening. The source/drain region is exposed to the contact opening. The method further includes depositing a dielectric spacer layer extending into the contact opening, etching the dielectric spacer layer to form a contact spacer in the contact opening, implanting a dopant into the source/drain region through the contact opening after the dielectric spacer layer is deposited, and forming a contact plug to fill the contact opening.

Abstract: An overcurrent protection circuit, a memory storage device, and an overcurrent protection method are disclosed. The overcurrent protection circuit includes a load switch, a first mirror circuit, a second mirror circuit, and a control circuit. The first mirror circuit is configured to generate a first node voltage in a state that a voltage difference between two terminals of the load switch is within a first voltage region. The second mirror circuit is configured to generate a second node voltage in a state that the voltage difference between the two terminals of the load switch is within a second voltage region. The control circuit is configured to cut off the load switch according to at least one of the first node voltage and the second node voltage to perform an overcurrent protection. The first voltage region is different from the second voltage region.

Abstract: A method includes forming a metallic feature, forming an etch stop layer over the metallic feature, implanting the metallic feature with a dopant, forming a dielectric layer over the etch stop layer, performing a first etching process to etch the dielectric layer and the etch stop layer to form a first opening, performing a second etching process to etch the metallic feature and to form a second opening in the metallic feature, wherein the second opening is joined with the first opening, and filling the first opening and the second opening with a metallic material to form a contact plug.

Abstract: An anti-spoofing authentication system includes an image capture device that converts received light into a voice signal representing a captured image; a microphone that converts sound wave into a voice signal; a face detection device that detects a human face on the captured image, the face detection device including a lip detection device that detects lip features associated with the detected human face; a voice activity detection (VAD) device that detects presence of human voice in the voice signal; and an anti-spoofing device that detects a spoofing attack according to the detected lip features and the detected human voice.

Abstract: A partial sounding method for sounding-reference-signal (SRS) is proposed. The network node may transmit higher-layer signal configuring a fractional SRS resource for partial sounding in configured resource blocks (RBs) to user equipment (UE). The UE may determine an SRS sequence length and a frequency-domain starting position of the fractional SRS resource based on the higher-layer signal to increase the SRS capacity.

Abstract: A sound source localization system includes a microphone array composed of a plurality of microphones each converting sound wave into a corresponding voice signal; a room shape estimator that determines a room shape including a location map and a corresponding template voice feature map composed of template voice features associated with a virtual sound source disposed at different locations respectively, and outputs a room reliability indicating confidence about the determined room shape; a lookup table (LUT) that pre-stores the location map and the corresponding template voice feature map; and a localizer that determines a location of a sound source according to the room reliability and similarity between a voice feature associated with the sound source and the template voice features of the template voice feature map.

Abstract: A method includes following steps. A dielectric layer is formed over a substrate. A transition metal-containing layer is deposited on the dielectric layer. The transition metal-containing layer is patterned into a plurality of transition metal-containing pieces. The transition metal-containing pieces are sulfurized or selenized to form a plurality of semiconductor seeds. Semiconductor films are grown from semiconductor seeds. Transistors are formed on the semiconductor films.

Abstract: A pin structure of a transformer bobbin is provided. The transformer bobbin includes a winding part on which at least one winding is wound, and at least one wire outlet part arranged on a side of the winding part. The pin structure includes at least two accommodating slots arranged at the wire outlet part, and at least two conductive pins. Each of the accommodating slots has two first sections and a second section connected to the two first sections. Each of the conductive pins corresponds to one of the accommodating slots, and includes a connection section in the second section and two exposed sections connected to the connection section and extending to an outside of the winding part via the two first sections. One exposed section can perform socket welding, and the other one is bendable to define the end of the winding with the wire outlet part.

Abstract: A semiconductor device includes a substrate, a 2-D material layer, source/drain contacts, and a gate electrode. The 2-D material layer is over the substrate, the 2-D material layer includes source/drain regions and a channel region between the source/drain regions, in which the 2-D material layer is made of a transition metal dichalcogenide (TMD). The source/drain contacts are in contact with source/drain regions of the 2-D material layer, in which a binding energy of transition metal atoms at the channel region of the 2-D material layer is different from a binding energy of the transition metal atoms at the source/drain regions of the 2-D material layer. The gate electrode is over the substrate.