Abstract: Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.

Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.

Abstract: An electronic package is provided, in which a ground layer is arranged on one side of an insulator, and a first antenna portion and a second antenna portion embedded in the insulator are vertically disposed on the ground layer, where a gap is formed between the first antenna portion and the second antenna portion, such that the first antenna portion and the second antenna portion are electrically matched with each other, and the ground layer is electrically connected to the second antenna portion but free from being electrically connected to the first antenna portion.

Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.

Abstract: An embodiment system, configured to clean a semiconductor package assembly, may include a sprayer device including a plurality of nozzles configured to direct a pressurized cleaning fluid toward the semiconductor package assembly; a conveyor configured to move the semiconductor package assembly relative to the sprayer device along a first direction; and a dryer spatially displaced from the sprayer device and configured to direct a pressurized gas flow toward the semiconductor package assembly to remove cleaning fluid introduced by the sprayer device. Each of the plurality of nozzles may be displaced from one another along a second direction to thereby generate respective separate spray distribution patterns. Adjacent nozzles may be further displaced from one another along a third direction to thereby a reduce an overlap of adjacent spray distribution patterns relative to a configuration in which the adjacent nozzles are not displaced from one another along the third direction.

Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.

Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.

Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.

Abstract: Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.

Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.

Abstract: An electronic package is provided, in which a mesh structure is disposed between a circuit structure and an electronic element to increase the shunt path of current. Therefore, when the electronic element is used as an electrode pad of a power contact, the current can be passed through a conductive sheet of the circuit structure via the mesh structure, such that the power loss can be reduced and the IR drop of the electronic element can meet the requirements.

Abstract: A three-dimensional printing apparatus includes a container and a projecting structure. The container is configured to contain a liquid photosensitive material. The projecting structure is configured to provide a variety of molding beams to irradiate the liquid photosensitive material. The photoinitiator is suitable for polymerizing with a monomer after receiving the first molding beam with the first wavelength to form a solidified layer with a first color, and the photoinitiator is suitable for polymerizing with the monomer after receiving the second molding beam with the second wavelength to form a solidified layer with a second color, wherein the first color is different from the second color. The projecting structure comprises a light combiner module, disposed on the transmission paths of a variety of light beams. The wavelengths of the first molding beam and the second molding beam are between 355 nm to 415 nm.

Abstract: A rehabilitation device includes a base unit, a circuit unit, a rolling unit, and a holding unit. The circuit unit includes a distance measuring element, which is partially exposed on a bottom surface of the base unit and can measure the moving distance of the base unit after the base unit contacts a plane. The rolling unit includes a plurality of rollers partially protruding from the base unit, a driving member, and at least one auxiliary wheel driven by the driving member. The rollers are continuously in contact with the plane, and the auxiliary wheel is driven to contact the plane. The rollers can make the base unit slide, allowing the user to stretch their upper limbs by themselves. When the user moves to his own limit position, the auxiliary wheel can be driven to gradually increase the moving distance of the base unit, so that the upper limb can be continuously stretched, and the limit of the extension distance and joint movement angle of the upper limb can be gradually increased.

Abstract: An integrated circuit includes a nanostructure transistor including a plurality of first semiconductor nanostructures over a substrate and a source/drain region in contact with each of the semiconductor nanostructures. The integrated circuit includes a fin sidewall spacer laterally bounding a lower portion of the source/drain region. The integrated circuit also includes a bottom isolation structure electrically isolating the source/drain region from the semiconductor substrate.

Abstract: In an embodiment, a device includes: first nanostructures; a first undoped semiconductor layer contacting a first dummy region of the first nanostructures; a first spacer on the first undoped semiconductor layer; a first source/drain region on the first spacer, the first source/drain region contacting a first channel region of the first nanostructures; and a first gate structure wrapped around the first channel region and the first dummy region of the first nanostructures.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A device includes a channel layer, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, and a sidewall spacer. The channel layer is over a substrate. The gate structure wraps around the channel layer. The first source/drain epitaxial structure and the second source/drain epitaxial structure are on opposite sides of the channel layer. The sidewall spacer is on a sidewall of the first source/drain epitaxial structure and includes a first dielectric layer and a second dielectric layer over the first dielectric layer and in contact with first source/drain epitaxial structure. The first dielectric layer and the second dielectric layer include different materials.

Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: An embodiment system, configured to clean a semiconductor package assembly, may include a sprayer device including a plurality of nozzles configured to direct a pressurized cleaning fluid toward the semiconductor package assembly; a conveyor configured to move the semiconductor package assembly relative to the sprayer device along a first direction; and a dryer spatially displaced from the sprayer device and configured to direct a pressurized gas flow toward the semiconductor package assembly to remove cleaning fluid introduced by the sprayer device. Each of the plurality of nozzles may be displaced from one another along a second direction to thereby generate respective separate spray distribution patterns. Adjacent nozzles may be further displaced from one another along a third direction to thereby a reduce an overlap of adjacent spray distribution patterns relative to a configuration in which the adjacent nozzles are not displaced from one another along the third direction.