Patents by Inventor Hans Krüger

Hans Krüger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100187949
    Abstract: A component has a substrate and a compensation layer. A lower face of the substrate is mechanically firmly connected to the compensation layer. The lower face of the substrate and the upper face of the compensation layer have a topography.
    Type: Application
    Filed: February 4, 2010
    Publication date: July 29, 2010
    Inventors: Wolfgang Pahl, Hans Krueger, Werner Ruile
  • Publication number: 20100172467
    Abstract: The present invention relates to an apparatus (10) for generating countable pulses (30) from impinging X-ray (12, 14) in an imaging device (16), in particular in a computer tomograph, the apparatus (10) comprising a pre-amplifying element (18) adapted to convert a charge pulse (20) generated by an impinging photon (12, 14) into an electrical signal (22) and a shaping element (26) having a feedback loop (28) and adapted to convert the electrical signal (22) into an electrical pulse (30), wherein a delay circuit (38) is connected to the feedback loop (28) such that a time during which the feedback loop (28) collects charges of the electrical signal (22) is extended in order to improve an amplitude of the electrical pulse (30) at an output (56) of the shaping element (26). The invention also relates to a corresponding imaging device (16) and a corresponding method.
    Type: Application
    Filed: July 24, 2008
    Publication date: July 8, 2010
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Roger Steadman Booker, Christian Baeumer, Christoph Herrmann, Guenter Zeitler, Hans Krüger, Walter Ruetten, Oliver Muelhens
  • Publication number: 20100148285
    Abstract: A MEMS component includes a chip that has a rear side having a low roughness of less than one tenth of the wavelength at the center frequency of an acoustic wave propagating in the component. Metallic structures for scattering bulk acoustic waves are provided on the rear side of the chip and a material of the metallic structures is acoustically matched to a material of the chip.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 17, 2010
    Inventors: Christian Bauer, Hans Krueger, Werner Ruile, Alois Stelzl
  • Publication number: 20100127377
    Abstract: A carrier substrate has a mounting location with a number of electrical connection pads on a top side and external contacts connected thereto on an underside. A metal frame encloses the connection pads of the mounting location. A MEMS chip has electrical contacts on an underside. The MEMS chip is placed on the mounting location of the carrier substrate in such a way that the MEMS chip is seated with an edge region of its underside on the metal frame. Using a flip-chip process, the electrical contacts of the MEMS chip are connected to the connection pads of the carrier substrate by means of bumps the metal frame is connected to the MEMS chip such that a closed cavity is formed between MEMS chip and carrier substrate.
    Type: Application
    Filed: November 30, 2009
    Publication date: May 27, 2010
    Inventors: Christian Bauer, Gregor Feiertag, Hans Krueger, Alois Stelzl
  • Patent number: 7673386
    Abstract: The electrical and mechanical connection between a component chip and a carrier substrate having electrical wiring is realized by means of bumps. A support frame that is adapted in its height to the height of the bumps is arranged between the carrier substrate and the component chip and has a planar or planarized surface, so that it contacts closely to the bottom side of the component chip. Different covers are proposed for the additional encapsulation.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: March 9, 2010
    Assignee: EPCOS AG
    Inventors: Alois Stelzl, Christian Bauer, Hans Krueger, Robert Hammedinger
  • Patent number: 7608789
    Abstract: A component arrangement includes a carrier substrate having at least one component arranged thereon. The carrier substrate contains at least one layer of glass film and an intermediate layer, which is mounted on at least one side of the glass film. The component is covered and sealed by a cover layer mounted on the carrier substrate.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: October 27, 2009
    Assignee: EPCOS AG
    Inventors: Hans Krüger, Alois Stelzl
  • Publication number: 20090224851
    Abstract: What is proposed is a preferably surface mounted electrical component with sensitive component structures which are arranged on the front side of two substrates. The substrates are joined with their front sides facing each other in such a manner that a cavity will remain for the component structures. The outer electrical connections for all component structures are located on the surface of one of the two substrates, in particular on the back side of the upper, or on the front side of the lower substrate. Between the two substrates there is a suitably structured intermediate layer which is used both as a spacer and also for sealing of the housing of the cavity.
    Type: Application
    Filed: May 24, 2006
    Publication date: September 10, 2009
    Applicant: EPCOS AG
    Inventors: Gregor Feiertag, Hans Krüger, Wolfgang Pahl, Alois Stelzl
  • Patent number: 7552532
    Abstract: A method is provided to produce a hermetic encapsulation for an electronic component, which may be an optical and at least partially light-permeable component or a surface wave component, comprises attaching and electrically contacting a component based on a chip to a carrier comprising electrical connection surfaces, such that a front of the chip bearing component structures facing the carrier is arranged to clear it, covering a back of the chip with a film made of synthetic material, such that edges of the film overlap the chip; tightly bonding the film and carrier in an entire edge region around the chip; structuring the film such that the film is removed around the edge region in a continuous strip parallel to the edge region; and applying a hermetically sealing layer over the film, such that this layer hermetically terminates with the carrier in a contact region outside of the edge region.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: June 30, 2009
    Assignee: EPCOS AG
    Inventors: Alois Stelzl, Hans Krueger, Gregor Feiertag, Ernst Christl
  • Patent number: 7544540
    Abstract: A micro-electro-mechanical systems (MEMS) component includes a panel, a chip having an underside containing active component structures, where the chip is mounted on the panel via bumps, a frame structure on the panel and enclosing an installation site of the chip, and a jet-printed structure closing a seam between frame structure and chip. The jet-printed structure has an upper edge that is above a lower edge of the chip.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: June 9, 2009
    Assignee: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Alois Stelzl
  • Publication number: 20090104415
    Abstract: A layer combination with a marking is proposed, for example, for a miniaturized electrical component. The layer combination includes a first layer and a different release layer, which is applied on it, on which a pattern is formed by a released pattern-like area. The release area is formed from an inorganic, semiconducting, insulating material, where the pattern produced thereon is machine-readable.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 23, 2009
    Inventors: Alexander Schmajew, Hans Krueger, Alois Stelzl
  • Patent number: 7518249
    Abstract: A component includes a carrier substrate having a coefficient of thermal expansion ?p and a chip mounted on the carrier substrate by a plurality of bumps. The chip has a first coefficient of thermal expansion ?1 in a first direction x1 and a first expansion difference, ??1 equal to the absolute value of ?p??1. The chip also has a second coefficient of thermal expansion ?2 in a second direction x2 and a second expansion difference ??2 is equal to the absolute value of ?p??2,. The bumps are arranged such that a first distance, ?x1, corresponding to a normal projection of a line between centers of terminally situated bumps in the first direction onto an axis running parallel to direction x1 is less than a second distance corresponding to a normal projection of a line between centers of terminally situated bumps in the second direction onto an axis parallel to direction x2.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: April 14, 2009
    Assignee: EPCOS AG
    Inventors: Hans Krueger, Karl Nicolaus, Juergen Portmann, Peter Selmeier
  • Patent number: 7518201
    Abstract: An arrangement having a component mounted on a carrier in a flip chip construction which is encapsulated by a film, in particular a plastic film, laminated over the entire surface of the component. For additional sealing and mechanical stabilization, a plastic compound in liquid form is subsequently applied and hardened so as to surround the chip.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: April 14, 2009
    Assignee: EPCOS AG
    Inventors: Alois Stelzl, Hans Krüger, Gregor Feiertag
  • Publication number: 20090071710
    Abstract: The electrical and mechanical connection between a component chip and a carrier substrate having electrical wiring is realized by means of bumps. A support frame that is adapted in its height to the height of the bumps is arranged between the carrier substrate and the component chip and has a planar or planarized surface, so that it contacts closely to the bottom side of the component chip. Different covers are proposed for the additional encapsulation.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 19, 2009
    Inventors: Alois Stelzl, Christian Bauer, Hans Krueger, Robert Hammedinger
  • Publication number: 20090001553
    Abstract: A micro electro-mechanical systems (MEMS) package is described herein. The package includes a carrier substrate having a top side, a MEMS chip mounted on the top side of the carrier substrate, and at least one chip component on or above the top side of the carrier substrate or embedded in the carrier substrate. The package also includes a thin metallic shielding layer covering the MEMS chip and the chip component and forming a seal with the top side of the carrier substrate.
    Type: Application
    Filed: November 6, 2006
    Publication date: January 1, 2009
    Applicant: EPCOS AG
    Inventors: Wolfgang Pahl, Anton Leidl, Stefan Seitz, Hans Krueger, Alois Stelzl
  • Patent number: 7388281
    Abstract: The present invention relates to an encapsulated component that includes a carrier substrate and at least one chip positioned on the top of the carrier substrate and electrically connected to it by means of electrically conductive connections. The encapsulation of the chip is accomplished with a seal or dielectric layer. As a result of differing coefficients of expansion of the seal or dielectric layer and the electrically conductive connections, with changing temperatures stresses occur in the electrically conductive connections, which can lead to cracks, breaks and even to interruption of the electrically conductive connections.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: June 17, 2008
    Assignee: EPCOS AG
    Inventors: Hans Krueger, Jürgen Portmann, Karl Nicolaus, Gregor Feiertag, Alois Stelzl
  • Publication number: 20080048317
    Abstract: A component includes a carrier substrate having a coefficient of thermal expansion ?p and a chip mounted on the carrier substrate by a plurality of bumps. The chip has a first coefficient of thermal expansion ?1 in a first direction x1 and a first expansion difference, ??1 equal to the absolute value of ?p??1. The chip also has a second coefficient of thermal expansion ?2 in a second direction x2 and a second expansion difference ??2 is equal to the absolute value of ?p??2,. The bumps are arranged such that a first distance, ?x1, corresponding to a normal projection of a line between centers of terminally situated bumps in the first direction onto an axis running parallel to direction x1 is less than a second distance corresponding to a normal projection of a line between centers of terminally situated bumps in the second direction onto an axis parallel to direction x2.
    Type: Application
    Filed: June 8, 2005
    Publication date: February 28, 2008
    Applicant: EPCOS AG
    Inventors: Hans Krueger, Karl Nicolaus, Juergen Portmann, Peter Selmeier
  • Publication number: 20070222056
    Abstract: A micro-electro-mechanical systems (MEMS) component includes a panel, a chip having an underside containing active component structures, where the chip is mounted on the panel via bumps, a frame structure on the panel and enclosing an installation site of the chip, and a jet-printed structure closing a seam between frame structure and chip. The jet-printed structure has an upper edge that is above a lower edge of the chip.
    Type: Application
    Filed: April 21, 2005
    Publication date: September 27, 2007
    Applicant: EPCOS AG
    Inventors: Christian Bauer, Hans Krueger, Alois Stelzl
  • Patent number: 7259041
    Abstract: For hermetic encapsulation of a component, which includes a chip with component structures applied on a substrate in a flip-chip construction, a material is applied onto the lower edge of the chip and regions of the substrate abutting the chip, and then a first continuous metal layer is applied on the back side of the chip and on the material, as well as on edge regions of the substrate abutting the material. For hermetic encapsulation, a second sealing metal layer is subsequently applied by a solvent-free process at least on those regions of the first metal layer that cover the material.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 21, 2007
    Assignee: Epcos AG
    Inventors: Alois Stelzl, Hans Krueger, Ernst Christl
  • Patent number: 7094626
    Abstract: An encapsulation method for sensitive composition is provided in which a film, in particular a plastic film, is laminated over the entire surface of an arrangement having a component mounted on a carrier in a flip chip construction. For additional sealing and mechanical stabilization, a plastic compound in liquid form is subsequently applied and hardened so as to surround the chip. Optionally, before the application of the plastic compound, the film can be removed in the area of structuring lines in such a way that the plastic compound can come into contact both with the carrier and with the chip surface.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: August 22, 2006
    Assignee: EPCOS AG
    Inventors: Alois Stelzl, Hans Krüger, Gregor Feiertag
  • Publication number: 20060151203
    Abstract: The present invention relates to an encapsulated component that includes a carrier substrate and at least one chip positioned on the top of the carrier substrate and electrically connected to it by means of electrically conductive connections. The encapsulation of the chip is accomplished with a seal or dielectric layer. As a result of differing coefficients of expansion of the seal or dielectric layer and the electrically conductive connections, with changing temperatures stresses occur in the electrically conductive connections, which can lead to cracks, breaks and even to interruption of the electrically conductive connections.
    Type: Application
    Filed: June 23, 2003
    Publication date: July 13, 2006
    Inventors: Hans Krueger, Jurgen Portmann, Karl Nicolaus, Gregor Feiertag, Alois Stelzl