Patents by Inventor Hans S. Cho

Hans S. Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8803212
    Abstract: A three-dimensional crossbar array may include a metal layer, and an insulator layer disposed adjacent the metal layer. A trench may be formed in the metal layer to create sections in the metal layer, and a portion of the trench may include an insulator. A hole may be formed in the trench and contact a section of the metal layer. The hole may define a via. A contact region between the via and the section of the metal layer may define a crossbar array.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: August 12, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Hans S. Cho
  • Publication number: 20140097398
    Abstract: Memristive devices, memristors and methods for fabricating memristive devices are disclosed. In one aspect, a memristor includes a first electrode wire and a second electrode wire. The second electrode wire and the first electrode wire define an overlap area. The memristor includes an electrode extension in contact with the first electrode wire and disposed between the first and second electrode wires. At least one junction is disposed between the second electrode wire and the electrode extension. Each junction contacts a portion of the electrode extension and has a junction contact area with the second electrode wire, and the sum total junction contact area of the at least one junction is less than the overlap area.
    Type: Application
    Filed: October 29, 2010
    Publication date: April 10, 2014
    Inventors: Hans S. Cho, Jianhua Yang, Janice H. Nickel
  • Patent number: 8569900
    Abstract: A nanowire device includes a nanowire having differently functionalized segments. Each of the segments is configured to interact with a species to modulate the conductance of a segment. The nanowire is grown from a single catalyst and the segments include a first segment at a non-linear angle from a second segment.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: October 29, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nathaniel J. Quitoriano, Theodore I. Kamins, Hans S. Cho
  • Patent number: 8547727
    Abstract: A memristive routing device includes a memristive matrix, mobile dopants moving with the memristive matrix in response to programming electrical fields and remaining stable within the memristive matrix in the absence of the programming electrical fields; and at least three electrodes surrounding the memristive matrix. A method for tuning electrical circuits with a memristive device includes measuring a circuit characteristic and applying a programming voltage to the memristive device which causes motion of dopants within the memristive device to alter the circuit characteristic. A method for increasing a switching speed of a memristive device includes drawing dopants from two geometrically separated locations into close proximity to form two conductive regions and then switching the memristive device to a conductive state by applying a programming voltage which rapidly merges the two conductive regions to form a conductive pathway between a source electrode and a drain electrode.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: October 1, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Wu, John Paul Strachan, R. Stanley Williams, Marco Florentino, Shih-Yuan Wang, Nathaniel J. Quitoriano, Hans S. Cho, Julien Borghetti, Sagi Varghese Mathai
  • Patent number: 8508009
    Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: August 13, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Hyuck Lim, Young-soo Park, Wenxu Xianyu, Hans S. Cho
  • Patent number: 8502188
    Abstract: An electrically actuated device includes a first electrode and a second electrode crossing the first electrode at a non-zero angle, thereby forming a junction therebetween. A material is established on the first electrode and at the junction. At least a portion of the material is a matrix region. A current conduction channel extends substantially vertically between the first and second electrodes, and is defined in at least a portion of the material positioned at the junction. The current conduction channel has a controlled profile of dopants therein.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: August 6, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D. Pickett, Hans S. Cho, Julien Borghetti, Duncan Stewart
  • Patent number: 8445332
    Abstract: A method of fabricating a single crystal silicon rod may include forming an insulation layer on a substrate, forming a hole in the insulation layer, selectively growing silicon in the hole, forming a silicon layer on the hole and on the insulation layer, forming a rod pattern on the silicon layer in a direction that is non-radial with respect to the hole, and melting the silicon layer and crystallizing the silicon layer by illuminating a laser beam on the silicon layer where the rod pattern is formed to generate a nucleation site at a position corresponding to the hole. According to the method, a single crystal silicon rod having no defects may be formed.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: May 21, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wenxu Xianyu, Young-soo Park, Hans S. Cho, Huaxiang Yin, Hyuck Lim
  • Patent number: 8405062
    Abstract: A method of forming a poly-silicon pattern may include forming an amorphous silicon pattern on a lower layer; forming a capping layer on the substrate covering the amorphous silicon pattern; poly-crystallizing the amorphous silicon pattern using an excimer laser annealing process; and removing the capping layer.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: March 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Young-soo Park, Wenxu Xianyu, Hans S. Cho
  • Patent number: 8389388
    Abstract: A photonic device (200) and method (100) of making the photonic device (200) employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (210). The method (100) includes growing (110) the polycrystalline layer (210) on a substrate (201). The polycrystalline layer includes a transition region (212) of variously oriented grains and a region (214) of columnar grain boundaries (215) adjacent to the transition region. The method further includes preferentially etching (120) the columnar grain boundaries to provide tapered structures (220) of the semiconductor material that are continuous (217) with respective aligned grains (213) of the transition region. The tapered structures are predominantly single crystal. The method further includes forming (140) a conformal semiconductor junction (240) on the tapered structures and providing (160) first and second electrodes.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, Theodore I. Kamins, Nathaniel J. Quitoriano
  • Publication number: 20130043056
    Abstract: A three-dimensional crossbar array may include a metal layer, and an insulator layer disposed adjacent the metal layer. A trench may be formed in the metal layer to create sections in the metal layer, and a portion of the trench may include an insulator. A hole may be formed in the trench and contact a section of the metal layer. The hole may define a via. A contact region between the via and the section of the metal layer may define a crossbar array.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 21, 2013
    Inventor: Hans S. Cho
  • Publication number: 20130000688
    Abstract: A thermoelectric device (100) includes a pair of spaced apart oppositely doped structures (110, 120) connecting between a common electrode (140) at a first end and different ones of a pair (150) of separate electrodes (150a, 150b) at a second end of the structures. Each oppositely doped structure includes a first material (112, 122) of a respectively doped semiconductor bounded by a second material (114, 124, 116, 126). Boundaries (111, 121) between the respective first and second materials are parallel to a charge carrier conduction path between the common electrode and the separate electrodes. The respectively doped semiconductor has a thickness configured to be less than a phonon scattering length.
    Type: Application
    Filed: March 23, 2010
    Publication date: January 3, 2013
    Inventors: Hans S. Cho, Alexandre M. Bratkovski, Theodore I. Kamins
  • Patent number: 8309404
    Abstract: A thin film transistor comprises an Si-based channel having a nonlinear electron-moving path, a source and a drain disposed at both sides of the channel, a gate disposed above the channel, an insulator interposed between the channel and the gate, and a substrate supporting the channel and the source and the drain disposed at either side of the channel respectively.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Takashi Noguchi, Hyuk Lim, Wenxu Xianyu, Hans S. Cho
  • Publication number: 20120281980
    Abstract: Various embodiments of the present invention are directed to sensor networks and to methods for fabricating sensor networks. In one aspect, a sensor network includes a processing node (110, 310), and one or more sensor lines (102,202,302) optically coupled to the processing node. Each sensor line comprises a waveguide (116,216,316), and one or more sensor nodes (112,210). Each sensor node is optically coupled to the waveguide and configured to measure one or more physical conditions and, encode measurement results in one or more wavelengths of light carried by the waveguide to the processing node.
    Type: Application
    Filed: January 29, 2010
    Publication date: November 8, 2012
    Inventors: Hans S. Cho, Alexandre M. Bratkovski, R. Stanley Williams, Peter George Hartwell
  • Patent number: 8258049
    Abstract: A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: September 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hans S. Cho
  • Patent number: 8258050
    Abstract: A method of making a crystalline semiconductor structure provides a photonic device by employing low thermal budget annealing process. The method includes annealing a non-single crystal semiconductor film formed on a substrate to form a polycrystalline layer that includes a transition region adjacent to a surface of the film and a relatively thicker columnar region between the transition region and the substrate. The transition region includes small grains with random grain boundaries. The columnar region includes relatively larger columnar grains with substantially parallel grain boundaries that are substantially perpendicular to the substrate. The method further includes etching the surface to expose the columnar region having an irregular serrated surface.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: September 4, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, Theodore I. Kamins
  • Patent number: 8203137
    Abstract: A photonic structure includes a plurality of annealed, substantially smooth-surfaced ellipsoids arranged in a matrix. Additionally, a method of producing a photonic structure is provided. The method includes providing a semiconductor material, providing an etch mask comprising a two-dimensional hole array, and disposing the etch mask on at least one surface of the semiconductor material. The semiconductor material is then etched through the hole array of the etch mask to produce holes in the semiconductor material and thereafter applying a passivation layer to surfaces of the holes. Additionally, the method includes repeating the etching and passivation-layer application to produce a photonic crystal structure that contains ellipsoids within the semiconductor material and annealing the photonic crystal structure to smooth the surfaces of the ellipsoids.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: June 19, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hans S. Cho, David A. Fattal, Theodore I. Kamins
  • Patent number: 8187905
    Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: May 29, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Hyuck Lim, Young-soo Park, Wenxu Xianyu, Hans S. Cho
  • Publication number: 20120112157
    Abstract: A nanowire device includes a nanowire 40 having differently functionalized segments 50, 51. Each of the segments 50, 51 is configured to interact with a species A, B to modulate the conductance of a segment 50, 51. The nanowire 40 is grown from a single catalyst 401 and the segments 50, 51 include a first segment 50 at a non-linear angle from a second segment 51.
    Type: Application
    Filed: July 20, 2009
    Publication date: May 10, 2012
    Inventors: Nathaniel J. Quitoriano, Theodore I. Kamins, Hans S. Cho
  • Publication number: 20120032168
    Abstract: A photonic device (200) and method (100) of making the photonic device (200) employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (210). The method (100) includes growing (110) the polycrystalline layer (210) on a substrate (201). The polycrystalline layer includes a transition region (212) of variously oriented grains and a region (214) of columnar grain boundaries (215) adjacent to the transition region. The method further includes preferentially etching (120) the colunmar grain boundaries to provide tapered structures (220) of the semiconductor material that are continuous (217) with respective aligned grains (213) of the transition region. The tapered structures are predominantly single crystal. The method further includes forming (140) a conformal semiconductor junction (240) on the tapered structures and providing (160) first and second electrodes.
    Type: Application
    Filed: April 30, 2009
    Publication date: February 9, 2012
    Inventors: Hans S. Cho, Theodore I. Kamins, Nathaniel J. Quitoriano
  • Publication number: 20120025343
    Abstract: A thermoelectric device having a variable cross-section connecting structure includes a first electrode, a second electrode, and a connecting structure connecting the first electrode and the second electrode. The connecting structure has a first section and a second section. The width of the second section is greater than the width of the first section, and the width of the first section is less than a width that is approximately equivalent to a phonon mean free path through the first section.
    Type: Application
    Filed: April 15, 2009
    Publication date: February 2, 2012
    Inventors: Philip J. Kuekes, Alexandre M. Bratkovski, Hans S. Cho, Nathaniel J. Quitoriano, Theodore I. Kamins, R. Stanley Williams