Abstract: A method of forming a material (e.g., ferroelectric) film, a method of manufacturing a capacitor, and a method of forming a semiconductor memory device using the method of forming the (e.g., ferroelectric) film are provided. Pursuant to an example embodiment of the present invention, a method of forming a ferroelectric film includes preparing a substrate, depositing an amorphous ferroelectric film on the substrate, and crystallizing the amorphous ferroelectric film by irradiating it with a laser beam. According to still another example embodiment of the present invention, a method of forming a ferroelectric film may reduce the thermal damage to other elements because the ferroelectric film may be formed at a temperature lower than about 500° C. to about 550° C.

Abstract: A method of preparing a semiconductor film on a substrate is disclosed. The method includes arranging an insulating substrate in a deposition chamber and depositing a semiconductor film onto the insulating substrate using ion beam deposition, wherein a temperature of the insulating substrate during the depositing does not exceed 250° C. The method can produce a thin film transistor. The disclosed ion beam deposition method forms, at lower temperature and with low impurities, a film morphology with desired smoothness and grain size. Deposition of semiconductor films on low melting point substrates, such as plastic flexible substrates, is enables.

Abstract: A method of forming a high quality channel region of a TFT by forming a large size monocrystalline silicon thin film using a patterned metal mask and a grain boundary filtering region is provided. The method includes sequentially stacking a first buffer layer and an amorphous silicon layer on a substrate, forming a first silicon region in which crystallization begins, a second silicon region having a width smaller than a width of the first silicon region and located on a central portion of a side of the first silicon region, and a third silicon region having a width than greater the width of the second silicon region and contacting the second silicon region, forming a metal mask partly on the first silicon region, and crystallizing the amorphous silicon layer by cooling the amorphous silicon layer after melting the entire amorphous silicon layer except for a portion of the amorphous silicon layer under the metal mask by radiating laser beams to the patterned amorphous silicon layer.

Abstract: A method of fabricating a single crystal silicon rod may include forming an insulation layer on a substrate, forming a hole in the insulation layer, selectively growing silicon in the hole, forming a silicon layer on the hole and on the insulation layer, forming a rod pattern on the silicon layer in a direction that is non-radial with respect to the hole, and melting the silicon layer and crystallizing the silicon layer by illuminating a laser beam on the silicon layer where the rod pattern is formed to generate a nucleation site at a position corresponding to the hole. According to the method, a single crystal silicon rod having no defects may be formed.

Abstract: Provided are a fin structure and a method of manufacturing a fin transistor adopting the fin structure. A plurality of mesa structures including sidewalls are formed on the substrate. A semiconductor layer is formed on the mesa structures. A capping layer is formed on the semiconductor layer. Thus, the semiconductor layer is protected by the capping layer and includes a portion which is to be formed as a fin structure. A portion of an upper portion of the capping layer is removed by planarizing, and thus a portion of the semiconductor layer on upper surfaces of the mesa structures is removed. As a result, fin structures are formed on sides of the mesa structures to be isolated from one another. Therefore, a fin structure having a very narrow width can be formed, and a thickness and a location of the fin structure can be easily controlled.

Abstract: A method of forming a poly-silicon pattern may include forming an amorphous silicon pattern on a lower layer; forming a capping layer on the substrate covering the amorphous silicon pattern; poly-crystallizing the amorphous silicon pattern using an excimer laser annealing process; and removing the capping layer.

Abstract: A method of manufacturing a bottom gate thin film transistor (“TFT”), in which a polycrystalline channel region having a large grain size is formed relatively simply and easily, includes forming a bottom gate electrode on a substrate, forming a gate insulating layer on the substrate to cover the gate electrode, forming an amorphous semiconductor layer on the gate insulating layer, patterning the amorphous semiconductor layer to form an amorphous channel region on the gate electrode, melting the amorphous channel region using a laser annealing method to form a melted amorphous channel region, and crystallizing the melted amorphous channel region to form a laterally grown polycrystalline channel region.

Abstract: A silicon nanowire substrate having a structure in which a silicon nanowire film having a fine line-width is formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the silicon nanowire substrate includes preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.

Abstract: A semiconductor device and method thereof. The example method may include forming a semiconductor device, including forming a first layer on a substrate, the first layer including aluminum nitride (AlN), forming a second layer by oxidizing a surface of the first layer and forming a third layer on the second layer, the first, second and third layers each being highly oriented with respect to one of a plurality crystallographic planes. The example semiconductor device may include a substrate including a first layer, the first layer including aluminum nitride (AlN), a second layer formed by oxidizing a surface of the first layer and a third layer formed on the second layer, the first, second and third layers each being highly oriented with respect to one of a plurality crystallographic planes.

Abstract: A single crystal substrate and method of fabricating the same are provided. The single crystal substrate includes an insulator having a window exposing a portion of a substrate, a selective epitaxial growth layer formed on the portion of the substrate exposed through the window and a single crystalline layer formed on the insulator and the selective epitaxial growth layer using the selective epitaxial growth layer as an epitaxial seed layer.

Abstract: A method in a mobile wireless communication device (10) including a wireless communication receiver/transmitter (20), a memory (30) for storing a communication address and an audio clip associated therewith, an audio output (60), a processor ((50) coupled to the memory and to the audio output, the processor for playing the audio clip at the audio output when a wireless communication originated from the communication address associated with the audio clip is received by the wireless communication receiver.

Abstract: A mobile wireless communication device, for example a cellular handset or pager or wireless communication enabled personal digital assistant or personal computer having a processor (10) coupled to memory (20) and an input pad (50) having a plurality of input keys. Multiple communication addresses are stored (300) in memory and associated (310) with one or more inputs of the same input key, for example a first telephone number is associated with a single input of a key, and a second telephone number is associated with two sequential inputs of the same input key as the first telephone number, etc. The communication addresses are transmitted (320) from the wireless communication device upon entering the one or more key inputs associated therewith and upon maintaining a last of the sequential key inputs for a predetermined time interval.