Abstract: A pixel structure includes pixel electrodes, data lines, and gate lines. Each of the pixel electrodes has two opposite ends that are each provided with one of the gate lines. The data lines and the gate lines re perpendicular to each other. Each of the pixel electrodes includes at least two sub-pixel domains. The data lines are located beneath the pixel electrode at interfacing between every two adjacent ones of the sub-pixel domains. The pixel electrodes each include slits located in the interfacing of the two adjacent sub-pixel domains. The slits are in alignment with the data line and located above the data line. Also provided is a liquid crystal display. The pixel structure and a liquid crystal display including the pixel structure have a reduced overlapping area between the data line and the pixel electrode above the data line so as to reduce parasitic capacitance and improve V-crosstalk.

Abstract: The present disclosure discloses a driving device for liquid crystal display panel, a liquid crystal display panel, and a driving method thereof, said driving device comprising: a plurality of scanning lines, a first control circuit, a second control circuit, and a third control circuit. According to the present disclosure, three control circuits are added to the driving device of the liquid crystal display panel, whereby normal two dimensional display can be realized without additional cost being added therein. The black frame insertion technology for eliminating the cross-talk phenomena during three dimensional display can be used, i.e., the dual-gates, which are used for reducing the influence of high frame rate on the charging of the liquid crystal panel, can be turned on simultaneously.

Abstract: A method for forming a device package includes forming a molding compound around a plurality of dies and laminating a polymer layer over the dies. A top surface of the dies is covered by a film layer while the molding compound is formed, and the polymer layer extends laterally past edge portions of the dies. The method further includes forming a conductive via in the polymer layer, wherein the conductive via is electrically connected to a contact pad at a top surface of one of the dies.

Abstract: A communications apparatus is provided. A controller module obtains information regarding a Hybrid Automatic Repeat Request (HARQ) round trip time (RTT) in an HARQ process, arranging one or more almost blank sub-frame(s) in one or more frame(s) according to the HARQ RTT information and generating a sub-frame pattern describing the arrangement of the almost blank sub-frame(s), wherein the HARQ RTT is defined by the communications system. A transceiver module transmits at least a signal carrying information regarding the sub-frame pattern to a peer communications apparatus in the communications system. In addition, at least one almost blank sub-frame in the sub-frame pattern is arranged in a sub-frame for the peer communications apparatus to transmit an uplink grant message for granting an user equipment to transmit uplink data to the peer communications apparatus.

Abstract: A holder includes a holding member, an attaching member, and a connecting structure. The holding member is configured to hold the portable electronic device thereon. The mounting member can be attached to an object, such as a user's arm or wrist. The connecting structure includes a first connecting member and a second connecting member rotatably coupled to the first connecting member. The first connecting member is coupled to the attaching member; the second connecting member is coupled to the holding member.

Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.

Abstract: An electronic device receives a first distance signal from a sensor embraced by a left receiver of a headset, and a second distance signal from a sensor embraced by a right receiver of the headset. The electronic device obtains a first distance between the left receiver and a left ear of the person according to the first distance signal, and obtains a second distance between the right receiver and a right ear of the person according to the second distance signal. The electronic device executes a specific operation according to the first distance and the second distance.

Abstract: A method is provided for current compensation. The method is based on division-sigma (D-?) control for a DC/DC converter. Inductance changes are allowed with D-? digital control achieved. Loop gain can be quickly adjusted. The disadvantage of average current-mode control (ACMC) is solved, where the disadvantage is a reduction of the response speed caused by the filter within the current loop. The present invention uses midpoint current sampling to ensure taking an average inductor current value in each switching cycle. By doing so, a lack of fidelity of peak current-mode control (PCMC) is solved, where the lack of fidelity is due to the amount of error value between the peak value and the average value. Besides, the present invention uses a table of the inductance following current changes to achieve compensation of duty cycle ratio, where the table is built in a single chip.

Abstract: Organic metal compounds, and organic light-emitting devices employing the same, are provided. The organic metal compound has a chemical structure represented by formula (I): wherein each R1 can be independently hydrogen, C1-12 alkyl group, C5-10 cycloalkyl group, C3-12 heteroaryl group, or C6-12 aryl group; R2 can be independently hydrogen, halogen, C1-12 alkyl group, C5-10 cycloalkyl group, C3-12 heteroaryl group, or C6-12 aryl group.

Abstract: Organic metal compounds and organic electroluminescence devices employing the same are provided. The organic metal compound has a chemical structure represented below: wherein R1, R2, R3, R4, and R5 are independent and can be hydrogen, halogen, C1-8 alkyl or C1-8alkoxy; L can be acetylacetone ligand, picolinic acid ligand, N,N?-diisopropylbenzamidinate, or N,N?-diisopropyl-diisopropyl-guanidinate.

Abstract: A semiconductor and a method for manufacturing the semiconductor device are provided. A semiconductor substrate is provided. A first oxide layer is formed over an active region. A first STI is formed to adjoin a first side of the active region, and a second STI is formed to adjoin a second side of the active region. A gate layer is formed over the first STI, the second STI and the first oxide layer. A masking element is formed over the gate layer. The gate layer is etched using the masking element to form a first gate electrode over the first oxide layer, a first dummy gate electrode over the first STI, and a second dummy gate electrode over the second STI. A width of the first gate electrode is smaller than a width of the first dummy gate electrode and a width of the second dummy gate electrode.

Abstract: An image access method applicable to an image access device is provided. The method includes: providing a plurality of codes that respectively represent a plurality of image sources; determining a plurality of sets of access settings according to a pixel format arrangement, each set of access setting corresponding to a code arrangement combination composed of the codes; and sequentially accessing data of the image sources by the image access apparatus according to the code arrangement combinations corresponding to the access settings.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first semiconductor material and a first reactivity; and a low reactivity capping layer of disposed on the semiconductor substrate, wherein the low reactivity capping layer includes a second semiconductor material and a second reactivity less than the first reactivity, the low reactivity capping layer includes silicon germanium Si1-xGex and x is less than about 30%.

Abstract: A cache system is provided. The cache system includes a first cache and a second cache. The first cache is configured for storing a first status of a plurality of data. The second cache is configured for storing a table. The table includes the plurality of data arranged from a highest level to a lowest level. The cache system is configured to update the first status of the plurality of data in the first cache. The cache system is further configured to update the table in the second cache according to the first status of the plurality of data.

Abstract: The present invention relates to an external skeletal fixator, which comprises a fixing member and a stereoscopic hood. The fixing member is disposed on a first end surface of the stereoscopic hood. The diameter of a second end surface of the stereoscopic hood is greater than that of the first end surface of the stereoscopic hood. When the stereoscopic hood is disposed to a pin passing through a skin tissue and a bone tissue, the second end surface of the stereoscopic hood is against the skin tissue surrounding a pin-skin interface and thus covering the stereoscopic hood over the pin-skin interface. The first end surface and a sidewall of the stereoscopic hood do not contact the pin-skin interface and the skin tissue around. Thereby, the contact area between the isolating structure and the pin-skin interface is reduced and the isolating structure blocks external germs from entering via the pin-skin interface.

Abstract: The present invention discloses a novel phenanthroline-based compound is represented by the following formula (I), the organic EL device employing the phenanthroline-based compound as hole blocking material/electron transport material or phosphorescent host can display good performance. L, m, n, X, Y and R1 to R20 each have the same meaning as described in the present invention.

Abstract: A memory system is provided. The memory system includes a memory controller and a first memory block. The first memory block is configured to store a first data from a top of the first memory block in a top-down fashion. The first memory block is configured to store a first metadata corresponding to the first data from a bottom of the first memory block in a bottom-up fashion. The first data forms a first data area. The first metadata forms a first metadata area. And a first continuous space is formed between a bottom of the first data area and a top of the first metadata area.

Abstract: An operating method for a memory, the memory comprising at least one memory block including a plurality of first pages and a plurality of second pages corresponding to the first pages, the operating method including the following steps: determining whether a target first page of the first pages is valid, wherein the target first page is corresponding to a target second page of the second pages; if the target first page is valid, performing first type programming on the target second page; if the target first page is invalid, performing second type programming on the target second page.

Abstract: A multiple-bit-per-cell, page mode memory comprises a plurality of physical pages, each physical page having N addressable pages p(n). Logic implements a plurality of selectable program operations to program an addressed page. Logic select one of the plurality of selectable program operations to program an addressed page in the particular physical page using a signal that indicates a logical status of another addressable page in the particular physical page. The logical status can indicate whether the other addressable page contains invalid data. The first program operation overwrites the other addressable page, and the second program operation preserves the other addressable page. The first program operation can execute more quickly than the second program operation. The logic can also be applied for programming multiple-bit-per-cell memory not configured in a page mode.

Abstract: Technology is described that increases endurance of memory devices through heal leveling. Heal leveling is a lightweight solution to distribute healing cycles among memory blocks. Approaches described herein can accomplish heal leveling without introducing a large amount of overhead. Heal leveling significantly improves the access performance and the effective lifetime of memory blocks. By more evenly distributing the heal count it may not be necessary to directly apply wear leveling based on access counts of each block because each block will be more evenly accessed in the long run. Heal leveling may be performed by moving data that is seldom or never modified after creation, such as read-only files, to blocks having suffered the greatest number, or a high number, of healing cycles.