Patents by Inventor Hao Chen

Hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250146509
    Abstract: A fan frame is provided to solve the problem that the metal plate of the conventional fan frame is easily squeezed and deformed. The fan frame includes a metal plate and a rim. The metal plate includes at least one notch located on an edge of the metal plate. The rim is formed on the edge of the metal plate by injection molding. The rim includes at least one gap located corresponding to the at least one notch of the metal plate. The at least one gap divides the rim into a plurality of side wall parts. A vertical extent of the at least one gap does not overlap with the metal plate. Fans including the fan frame are also disclosed.
    Type: Application
    Filed: December 11, 2023
    Publication date: May 8, 2025
    Inventors: PO-HAO CHEN, CHING-CHIA HUANG
  • Publication number: 20250151330
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a cap layer over the gate stack. The semiconductor device structure includes a protective layer over the cap layer. A lower portion of the protective layer extends into the cap layer. The semiconductor device structure includes a contact structure passing through the protective layer and the cap layer.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Inventors: An-Hung TAI, Jian-Hao CHEN, Hui-Chi CHEN, Kuo-Feng YU
  • Publication number: 20250151498
    Abstract: A light source module and a display device include a substrate configured to have a plurality of light-emitting regions arranged in an array manner, each light-emitting region is provided with two light-emitting groups, each light-emitting group includes a plurality of light-emitting branches arranged side by side, and two driving chips are disposed in parallel between the two light-emitting groups; and single-layer layout wiring arranged on the substrate, wherein the single-layer layout wiring couples the driving chips within the light-emitting regions to each other and electrically connects each of the driving chips to the light-emitting branches within one of the light-emitting groups.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhengbo CUI, Hongzhao DENG, Jing LIU, Hao CHEN
  • Publication number: 20250147219
    Abstract: A front light module configured to be disposed on a display panel to illuminate the display panel is provided. The front light module includes a light source and a light guide plate. The light guide plate has a first surface facing away from the display panel, a second surface facing the display panel, and a light incident surface facing the light source. The light incident surface connects the first surface and the second surface. The first surface has multiple sets of optical micro-structures. Each of the sets of the optical micro-structures includes multiple optical micro-structures disposed or distributed asymmetrically.
    Type: Application
    Filed: October 9, 2024
    Publication date: May 8, 2025
    Applicant: E Ink Holdings Inc.
    Inventors: Chia Feng Ho, Jen-Yuan Chi, Yu-Nan Pao, Yen-Hao Chen, Yu-Chuan Wen, Hsin-Tao Huang
  • Publication number: 20250146041
    Abstract: Provided herein are methods of cell-free protein synthesis, optimised cell-free protein synthesis (CFPS) reagents and the post translational modification of the expressed proteins, to increase protein expression yields. The methods are applicable to protein expression on a microfluidic device having hydrophobic surfaces by merging droplets on the device in order to screen a selection of expression and post translational modification compositions in parallel.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 8, 2025
    Inventors: Michael Chun Hao Chen, Gordon Ross Mclnroy
  • Publication number: 20250149401
    Abstract: A manufacturing method of a package structure includes: forming a first package component, where the first package component includes a first insulating encapsulation laterally covering semiconductor dies and a redistribution structure formed on the first insulating encapsulation and the semiconductor dies; coupling the first package component to a second package component; forming an underfill layer between the first and second package component, where the underfill layer extends to cover a sidewall of the first package component; forming a metallic layer on opposing surfaces of the semiconductor dies and the first insulating encapsulation by using a jig, where a window of the jig accessibly exposes the opposing surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the opposing surface of the first insulating encapsulation is shielded by the jig.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20250150307
    Abstract: An apparatus includes a transceiver configured to receive, over a wireless communication channel, at least one controlled-noise signal. The apparatus also includes a processor, operatively coupled to the transceiver. The processor is configured to train, based on the at least one controlled-noise signal, a noise prediction model for the wireless communication channel, and generate, based on the trained noise prediction model, a noise prediction for the wireless communication channel. The processor is also configured to determine, based on the received at least one controlled-noise signal and the noise prediction, a score function for the wireless communication channel.
    Type: Application
    Filed: October 3, 2024
    Publication date: May 8, 2025
    Inventors: Xiaochuan Ma, Yan Xin, Yong Ren, Daoud Burghal, Hao Chen, Jianzhong Zhang
  • Patent number: 12293792
    Abstract: A voltage prediction method, a memory storage device and a memory control circuit unit are disclosed. The method includes: reading a plurality of memory cells in a rewritable non-volatile memory module by using a first read voltage level to obtain count information, and the first read voltage level is configured to distinguish a first state and a second state adjacent to each other in a threshold voltage distribution of the memory cells, and the count information reflects a total number of first memory cells meeting a target condition among the memory cells; and predicting a second read voltage level according to the count information, and the second read voltage level is configured to distinguish a third state and a fourth state adjacent to each other in the threshold voltage distribution.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: May 6, 2025
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Po-Cheng Su, Po-Hao Chen, Yu-Cheng Hsu, Wei Lin
  • Patent number: 12293784
    Abstract: A voltage calibration method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: reading first data from a first physical unit using a first read voltage level and reading second data from at least one second physical unit using a second read voltage level; obtaining count information reflecting a total number of memory cells meeting a default condition in the first physical unit and the at least one second physical unit according to the first data and the second data; and calibrating the first read voltage level according to the count information.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: May 6, 2025
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Po-Hao Chen, Po-Cheng Su, Shih-Jia Zeng, Yu-Cheng Hsu, Wei Lin
  • Patent number: 12293740
    Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. A plurality of lenticular lenses may extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. Crosstalk between viewing zones and disparity between images received from different viewing zones may result in disparity-caused shifts in images perceived by viewer of the lenticular display. To mitigate these disparity-caused shifts, compensation circuitry may be included in the display pipeline circuitry. The compensation circuitry may include stored disparity-caused shift calibration information that is used for the compensation. The stored disparity-caused shift calibration information may be a polynomial function that outputs a magnitude of disparity-caused shift for a given pixel location.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: May 6, 2025
    Assignee: Apple Inc.
    Inventors: Ping-Yen Chou, ByoungSuk Kim, Fu-Chung Huang, Hao Chen, Juan He, Jun Qi, Mingming Wang, Sheng Zhang, Yang Li, Yi Huang, Yi-Pai Huang, Yunhui Hou
  • Patent number: 12291777
    Abstract: Processing methods and apparatus for increasing a reaction chamber batch size. Such a method of processing deposition substrates (e.g., wafers), involves conducting a deposition on a first portion of a batch of deposition wafers in a reaction chamber, conducting an interval conditioning reaction chamber purge to remove defects generated by the wafer processing from the reaction chamber; and following the interval conditioning mid-batch reaction chamber purge, conducting the deposition on another portion of the batch of wafers in the reaction chamber. The interval conditioning reaction chamber purge is conducted prior to exceeding a baseline for acceptable defect (e.g., particle) generation in the chamber and is performed while no wafers are positioned in the reaction chamber.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 6, 2025
    Assignee: Lam Research Corporation
    Inventors: Chun-Hao Chen, Jeremy David Fields, Frank Loren Pasquale
  • Publication number: 20250139460
    Abstract: A method for training a contrastive learning model, acquiring an optimization item, and pushing information includes: obtaining sample data including first category information and query information; predicting a correlation between the first category information and the query information using the contrastive learning model; establishing a loss function based on the prediction results, wherein the loss function is configured to characterize accuracy of the prediction results; optimizing the loss function based on a semantic relationship between the first category information and second category information, wherein the first category information and the second category information correspond to different semantic information in a category tree, and the semantic relationship is related to relative positions of the first category information and the second category information within the category tree; and training the contrastive learning model based on the optimized loss function.
    Type: Application
    Filed: September 18, 2024
    Publication date: May 1, 2025
    Inventors: Lyuxing Zhu, Kexin Zhang, Hao Chen, Chao Wei, Weiru Zhang, Haihong Tang, Xiu Li
  • Publication number: 20250137976
    Abstract: Provided by the present disclosure is an ultrasonic phased array-based in-situ imaging method for melt flow in injection molding. The ultrasonic phased array is used for the detection of an injection molding process for the first time, and an effective dynamic monitoring imaging method for a melt front position is developed. A melt flow process in a mold cavity is dynamically monitored by collecting an FMC (Full matrix capture) dataset online. A mapping relationship between an incident angle and a target pixel point is established to rapidly determine time delay of each point in a measurement target region, and a melt bottom image is acquired using TFM (Total focusing method) imaging conditions, from which the melt front can be localized. The provided method is high in measurement accuracy, short in imaging time, and capable of effectively improving imaging efficiency of online measurement.
    Type: Application
    Filed: October 24, 2024
    Publication date: May 1, 2025
    Inventors: Peng ZHAO, Kaipeng Ji, Ruoxiang Gao, Hao Chen, Wei Zhang, Chengqian Zhang, Jianzhong Fu
  • Publication number: 20250141313
    Abstract: The disclosure relates to electrical machine condition monitoring by placement of a Fibre Bragg Grating (FBG) in the stator of an electrical machine. Example embodiments include an electrical machine comprising: a stator having a plurality of stator teeth having windings around each tooth; a rotor rotatably mounted within the stator; and an optical fibre mounted to the stator, wherein the optical fibre comprises a Fibre Bragg Grating, FBG, positioned between an adjacent pair of stator teeth and oriented to measure a tangential strain between the pair of stator teeth.
    Type: Application
    Filed: October 4, 2024
    Publication date: May 1, 2025
    Applicant: ROLLS-ROYCE plc
    Inventors: Hao CHEN, Ellis F H CHONG, Carl BOETTCHER
  • Patent number: 12288811
    Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming an n-type work function layer in a gate trench in a gate structure, wherein the n-type work function layer is formed around first channel layers in a p-type gate region and around second channel layers in an n-type gate region, forming a first metal fill layer in a first gate trench over the n-type work function layer in the p-type gate region and in a second gate trench over the n-type work function layer in the n-type gate region, removing the first metal fill layer from the p-type gate region, removing the n-type work function layer from the p-type gate region, forming a p-type work function layer in the first gate trench of the p-type gate region, and forming a second metal fill layer in the first gate trench of the p-type gate region.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: April 29, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hang Chiu, Kuan-Ting Liu, Chi On Chui, Chia-Wei Chen, Jian-Hao Chen, Cheng-Lung Hung
  • Patent number: 12289856
    Abstract: A tray and an electronic device using the same are provided. The tray used to carry an expansion card includes a base, a tray body, a sliding plate, and a limiting spring. The tray body is slidably disposed on the base and has a base portion and two side walls disposed on two sides of the base portion. The sliding plate is slidably disposed on the base portion and is able to be moved away from or close to one of the side walls relative to the tray body selectively. The limiting spring is disposed on the base portion and is used to limit the sliding plate.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: April 29, 2025
    Assignee: Wistron Corporation
    Inventors: Yu-Chen Lin, Li-Shu Chen, Ching-Hao Chen
  • Publication number: 20250133834
    Abstract: A display panel is provided, including a grounding signal wiring, driving chips, a driving chip input output signal wiring, and a power line. A grounding signal pin is connected to the grounding signal wiring. The driving chip input output signal wiring is configured to connect a stage-transfer signal input pin and a stage-transfer signal output pin of two adjacent driving chips. The grounding signal wiring, the driving chip input output signal wiring, and the power line are disposed in a same layer and do not intersect with each other.
    Type: Application
    Filed: January 2, 2025
    Publication date: April 24, 2025
    Inventors: Jing LIU, Hongzhao DENG, Zhengbo CUI, Hao CHEN
  • Publication number: 20250128561
    Abstract: Methods and apparatus are disclosed for adjusting the front to rear ratio of roll damping and/or roll stiffness in a vehicle based on vehicle yaw rate and/or the rate of change of steering wheel angle. Also disclosed are methods and apparatus for dynamically adjusting one or more suspension system control parameters based on one or more of steering wheel angle, rate of change of steering wheel angle and yaw rate.
    Type: Application
    Filed: December 24, 2024
    Publication date: April 24, 2025
    Applicant: ClearMotion, Inc.
    Inventors: Aditya Chandrashekhar Chetty, Allen Chung-Hao Chen
  • Publication number: 20250132268
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: December 27, 2024
    Publication date: April 24, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: D1072805
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: April 29, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Han-Tsai Liu, Jyh-Chyang Tzou, Yao-Hsien Yang, Meng Ju Wu, Pai-Feng Chen, I-Hao Chen