Patents by Inventor Hao Chen

Hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240404080
    Abstract: A fitness posture guidance method and a fitness posture guidance system are provided. A setting of a plurality of target fitness postures and one attention part of a target fitness action is received. A plurality of target frames respectively corresponding to the target fitness postures are obtained from an expert video according to a plurality of marked times. A professional angle range of the attention part of each of the target fitness postures is obtained based on a plurality of body feature points of each of the target frames to generate an expert motion model. The expert motion model is integrated with an application motion model to generate a final motion model including a final angle range of the attention part of each of the target fitness postures. A prompt function is executed according to the final motion model and multiple body postures in a real-time video stream.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 5, 2024
    Applicant: Wistron Corporation
    Inventors: Hong-Ting Cheng, Chia-Yin Li, Hao Chen Weng
  • Publication number: 20240401621
    Abstract: The present invention provides a magnetic computer case comprising a first plate body, a second plate body and a third plate body. The first plate body is provided with a first connection part, where the first connection part is provided at a corner of the first plate body. The second plate body is provided on one side of the first plate body and provided with a second connection part, where the second connection part is provided at a corner of the second plate body. The second plate body is provided with a third connection part and the third connection part is provided at a corner of the third plate body, such that the first plate body is movably and magnetically connected with the third plate body and the second plate body.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 5, 2024
    Inventor: Chien-Hao CHEN
  • Publication number: 20240402902
    Abstract: Embodiments of the present disclosure relate to a video processing method and apparatus, a device, and a medium. The method includes: obtaining a reference editing operation sequence specified by a user, where the reference editing operation sequence includes at least one reference editing operation arranged in a sequential order of operations; and providing operation prompts according to the sequential order of the reference editing operations, to direct the user to perform the reference editing operations on a target video step by step, where each reference editing operation in the reference editing operation sequence has a corresponding operation prompt.
    Type: Application
    Filed: May 28, 2024
    Publication date: December 5, 2024
    Inventors: Li TANG, Zhiwei LI, Lei LAI, Zhijian ZENG, Siyu HE, Hao CHEN, Yongqing JIN, Jianxia YOU
  • Publication number: 20240402218
    Abstract: A probe head includes multiple probes and guide plates. Each probe includes a first end, a second end, and a probe body. The first end abuts a contact pad of a device under test. The second end abuts a contact pad of a board of a probe system. The probe body extends between the first end and the second end according to a longitudinal development axis. The guide plate includes a guide-hole pair for a probe pair of the probe head to respectively pass through, and the guide-hole pair slidably accommodate the pair of probes. The guide plate further includes an extension hole extending from one guide hole of the guide-hole pair to another guide hole. The extension hole intersects with at least one of the first guide holes and is located substantially between the probe pair on the first guide plate.
    Type: Application
    Filed: August 16, 2024
    Publication date: December 5, 2024
    Inventors: CHIN-TIEN YANG, YU-HAO CHEN, HUI-PIN YANG, CHI-HSIEN LI
  • Patent number: 12160829
    Abstract: A method includes obtaining a sleep-wake schedule associated with Wi-Fi communication of a Wi-Fi station (STA). The method also includes obtaining UWB-related information associated with ultra-wide band (UWB)-communication of a ranging capable device (RDEV). The method also includes determining a UWB ranging timeline based on a comparison of the sleep-wake schedule and the UWB-related information. The method also includes instructing the RDEV to use the UWB ranging timeline in a UWB ranging event.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 3, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Rebal Al Jurdi, Rubayet Shafin, Hao Chen, Boon Loong Ng
  • Patent number: 12160298
    Abstract: A method includes receiving CSI frames among P CSI frames transmitted from another electronic device. The method includes estimating a CSI from each of the received CSI frames as an available CSI estimate. The method includes identifying an impairment model accounting for inclusion of amplitude or phase errors of an estimated CSI corresponding to a p-th CSI frame among the P CSI frames. The method includes compensating, via the impairment model, for the errors in amplitude and phase of P CSI estimates. Compensating for the errors in amplitude and phase of the P CSI estimates can be based on: approximating a missing CSI estimate based on the available CSI estimates; determining an AGC gain value; or computing the errors in the phase based on a weighted least-squares solution. The method includes estimating a breathing rate of a subject based on different spatial dimensions of the P compensated CSI estimates.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: December 3, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vishnu Vardhan Ratnam, Hao Chen, Abhishek Sehgal, Hao-Hsuan Chang
  • Patent number: 12156604
    Abstract: A portable mat capable of blocking air convection and temperature radiation is disclosed. The portable mat is an inflatable mat, and includes a first outer covering layer and a second outer covering layer that are connected by a plurality of connecting members each in the form of a thin and light ring. Side pieces of the connecting members each have different widths according to high and low positions. A plurality of blocking layers of a blocking unit is fitted on the connecting members. The block layers have openings with different widths. The openings of the blocking layers are different in size corresponding to the different widths of the connecting member, so that the blocking layers are positioned at different heights to form a plurality of spaced space inside the mate, thereby blocking air convection and reducing temperature radiation.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: December 3, 2024
    Assignee: CATHAY CONSOLIDATED INC.
    Inventor: Hao-Chen Lee
  • Patent number: 12159791
    Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: December 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Yi Lin, Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Jyh Chwen Frank Lee, Shuo-Mao Chen
  • Publication number: 20240395197
    Abstract: A pixel circuit includes a first driving circuit, a first control circuit, a second driving circuit and a second control circuit. The first driving circuit is configured to write a first data signal into a first node in response to a scanning signal. The first control circuit is configured to transmit a first voltage signal to the first driving circuit, and transmit a first driving signal generated by the first driving circuit according to a voltage of the first node and the first voltage signal in response to an enable signal. The second driving circuit is configured to write a second data signal into a second node in response to the scanning signal. The second control circuit is configured to transmit a second driving signal generated by the second driving circuit according to a voltage of the second node and the first voltage signal in response to a control signal.
    Type: Application
    Filed: June 30, 2021
    Publication date: November 28, 2024
    Inventors: Seungwoo HAN, Haoliang ZHENG, Li XIAO, Dongni LIU, Liang CHEN, Hao CHEN, Jiao ZHAO, Minghua XUAN
  • Publication number: 20240393367
    Abstract: A probe head includes multiple probes and guide plates. Each probe includes a first end, a second end, and a probe body. The first end abuts a contact pad of a device under test. The second end abuts a contact pad of a board of a probe system. The probe body extends between the first end and the second end according to a longitudinal development axis. The guide plate includes a guide-hole pair for a probe pair of the probe head to respectively pass through, and the guide-hole pair slidably accommodate the pair of probes. The guide plate further includes an extension hole extending from one guide hole of the guide-hole pair to another guide hole to provide compensating impedance between the guide-hole pair, improve impedance matching when probing the device under test with the probe pair, and reduce return loss between the probe head and the device under test.
    Type: Application
    Filed: April 25, 2024
    Publication date: November 28, 2024
    Inventors: CHIN-TIEN YANG, YU-HAO CHEN, HUI-PIN YANG, CHI-HSIEN LI
  • Publication number: 20240395963
    Abstract: A method for manufacturing a TOPCon cell includes following steps: texturing a front side of an silicon wafer and then preparing a PN junction; forming a tunnel oxide layer, an intrinsic polysilicon layer, a doped polysilicon layer, and a silicon oxide mask layer in sequence on a back side of the silicon wafer, wherein the tunnel oxide layer is deposited by PEALD at a deposition temperature of 150° C. to 200° C., the doped polysilicon layer is deposited by PECVD, and the silicon oxide mask layer has a thickness of 10 nm to 40 nm; removing a wraparound silicon oxide mask layer material and a wraparound polysilicon layer material from the front side of the silicon wafer, and then removing the silicon oxide mask layer from the back side; and forming a front electrode on the PN junction and a back electrode on the doped polysilicon layer, respectively.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 28, 2024
    Inventors: Wenzhou XU, Hao CHEN, Mingzhang DENG, Yu HE, Fan ZHOU, Guoqiang XING, Qian YAO
  • Publication number: 20240395727
    Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20240395851
    Abstract: A chip of a LED, comprising: a current blocking layer including a first current blocking layer grown along an epitaxial layer and a plurality of second current blocking layers disposed at one end of the first current blocking layer at intervals, the first current blocking layer gradually widens along a direction away from the second current blocking layers; a transparent conductive layer including a first transparent conductive layer and a second transparent conductive layer grown on the epitaxial layer, the first transparent conductive layer is grown on the current blocking layer and at least partially overlapped with the second current blocking layers; a metal finger electrode having a width gradually narrowed from the first end to the second end thereof and smaller than the width of the first current blocking layer, and the second current blocking layers are distributed around the first end of the metal finger electrode.
    Type: Application
    Filed: May 15, 2023
    Publication date: November 28, 2024
    Applicant: Focus Lightings Tech (Suqian) Co., Ltd.
    Inventors: Zhiqiang CHU, Hao CHEN, Shikang QU, Zhiqiang ZHANG, Chuang MA, Jie GAO, Zhen ZHANG, Qian ZHAO, Hebing WU, Yufei CAO
  • Publication number: 20240393368
    Abstract: A probe system and a probe card, a probe head and a guide plate structure thereof are described herein. The probe head includes a plurality of probes and guide plates. Each probe includes a first end, a second end, and a probe body. The first end is configured to abut a contact pad of the device under test. The second end is configured to abut a contact pad of a board of the probe system. The probe body extends between the first end and the second end according to a longitudinal development axis. The guide plate includes a pair of first guide holes for a pair of probes to pass through, and the pair of first guide holes are configured to slidably accommodate the pair of probes. The material between the pair of first guide holes in the guide plate has a relative dielectric constant not greater than 6, so as to reduce the return loss between the probe head and the device under test.
    Type: Application
    Filed: April 25, 2024
    Publication date: November 28, 2024
    Inventors: CHIN-TIEN YANG, YU-HAO CHEN, HUI-PIN YANG, CHI-HSIEN LI
  • Publication number: 20240395508
    Abstract: A semiconductor manufacturing apparatus for performing a process is disclosed. An apparatus includes a chamber configured to receive a wafer for an etching process; a conductive focus ring disposed within the chamber and configured to focus an electric field to control an etch direction of the etching process; and an insulative cover ring disposed within the chamber, wherein the insulative cover ring is configured to modify the electric field, wherein the insulative cover ring has an inner annular insulative portion and outer annular insulative portion, and wherein a gap is defined between the inner annular insulative portion and the outer annular insulative portion.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chung Chuan Huang, Yi-Tsang Hsieh, Yu-Chi Lin, Cha-Hsin Chao, Che-En Tsai
  • Publication number: 20240397165
    Abstract: A method, an apparatus, and an electronic device for providing product object information are disclosed. The method includes: providing an interactive content in a process of playing a live video content associated with a product object, the interactive content being generated according to a material associated with the product object, and the material being used to describe attributes of the product object; and providing a change process of the interactive content according to the material in a process of responding to interactive operation information inputted by a user, to enable a presentation of multiple attributes of the product object. Through the embodiments of the present disclosure, the product object information can be provided to consumers in a more comprehensive and intuitive manner, so as to help the users to make better shopping decisions.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Shu Wang, Wenliang Li, Qin XU, Yishu LIANG, Yanan Hao, Yueshan ZHANG, Hao CHEN, Zhou YANG, Na AN, Xiang DUAN
  • Patent number: 12154933
    Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Chien Hsieh, Kuo-Cheng Lee, Ying-Hao Chen, Yun-Wei Cheng
  • Patent number: 12156479
    Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes a magnetic tunneling junction (MTJ) and a spin Hall electrode (SHE). The MTJ includes a free layer, a reference layer and a barrier layer lying between the free layer and the reference layer. The SHE is in contact with the MTJ, and configured to convert a charge current to a spin current for programming the MTJ. The SHE is formed of an alloy comprising at least one heavy metal element and at least one light transition metal element. The heavy metal element is selected from metal elements with one or more valence electrons filling in 5d orbitals, and the light transition metal element is selected from transition metal elements with one or more valence electrons partially filling in 3d orbitals.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Lin Huang, MingYuan Song, Chien-Min Lee, Shy-Jay Lin, Chi-Feng Pai, Chen-Yu Hu, Chao-Chung Huang, Kuan-Hao Chen, Chia-Chin Tsai, Yu-Fang Chiu, Cheng-Wei Peng
  • Patent number: 12153072
    Abstract: Provided are a method and apparatus for monitoring a current of the ground wire of an armouring shielding cable in a strong electromagnetic environment. In the method, a summation of currents of the ground wires in the armouring layer and a summation of currents of the ground wires in the shielding layer of M cables in a terminal box are collected, and a primary ground copper busbar potential and a secondary ground copper busbar potential of the terminal box and a ground current of an adjacent terminal box are collected; a potential difference alarm can be achieved; and according to whether a potential difference is alarmed, terminal box cable loop loop-current alarms are performed respectively using different criteria.
    Type: Grant
    Filed: December 29, 2023
    Date of Patent: November 26, 2024
    Assignee: State Grid Nanjing Supply Power Company
    Inventors: Hao Chen, Mai Xiao, Honghua Xu, Bing Xia, Zichang Sun, Ruowei Zhang, Zhangying Li, Chunyan Ma, Chi Xu
  • Patent number: D1053441
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: December 3, 2024
    Inventor: Thomas Tsu-Hao Chen