Patents by Inventor Hao Chen

Hao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10579107
    Abstract: Reversible connector orientation detection circuitry, reversibly connectible devices having multiple device portions, and methods for determining a connection orientation of multiple device portions of a hardware device are provided herein. A hardware device can include a first device portion and a second device portion. A first resistor can be in a first side of the first device portion. A second resistor can be in a first side of the second device portion, and a third resistor can be in a second side of the second device portion. Connection of the first device portion to the second device portion in different orientations creates, through the resistors, different voltages that can be compared by a digital logic device to indicate orientation. The compared voltages are within either a low voltage range below a digital logic low threshold or a high voltage range above a digital logic high threshold.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: March 3, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: James Hao-An Chen Lin, Jyhlin Chang, Manish Shah
  • Patent number: 10580505
    Abstract: An erasing method used in a flash memory having memory blocks is illustrated, each of the memory blocks is divided into a plurality of memory sectors, and steps of the erasing method is illustrated as follows. An erasing and verifying process is performed sequentially on the memory blocks or the memory sectors of the memory block according to a memory sector enable signal. An over-erased correcting and verifying process is performed sequentially on the memory blocks or the memory sectors of the memory block according to the memory sector enable signal, wherein the memory sector enable signal is set to be asserted if an over-erased correction is performed on at least one of the memory blocks or at least one of the memory sectors of the memory block.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: March 3, 2020
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventor: Chih-Hao Chen
  • Publication number: 20200064536
    Abstract: A light guide plate, a backlight module and a display device are provided. The light guide plate includes a main body and optical structures. The main body has a light-incident surface, an opposite light-incident surface, and an optical surface. The optical structures are disposed on the optical surface. Each of the optical structures has a first optical active surface and a second optical active surface, and the first optical active surface and the second optical active surface are inclined towards different directions and formed in a non-symmetrical shape. A first inclined angle is formed between the first optical active surface and the optical surface. A second inclined angle is formed between the second optical active surface and the optical surface. The first included angle is greater than the second included angle, and a light-emitting angle of the light guide plate decreases exponentially with the first inclined angle.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Inventors: Chia-Yin CHANG, Chin-Ting Weng, Hao Chen, Yi-Ching Chung
  • Publication number: 20200066869
    Abstract: A method and structure for doping source and drain (S/D) regions of a PMOS and/or NMOS FinFET device are provided. In some embodiments, a method includes providing a substrate including a fin extending therefrom. In some examples, the fin includes a channel region, source/drain regions disposed adjacent to and on either side of the channel region, a gate structure disposed over the channel region, and a main spacer disposed on sidewalls of the gate structure. In some embodiments, contact openings are formed to provide access to the source/drain regions, where the forming the contact openings may etch a portion of the main spacer. After forming the contact openings, a spacer deposition and etch process may be performed. In some cases, after performing the spacer deposition and etch process, a silicide layer is formed over, and in contact with, the source/drain regions.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Chun Hsiung TSAI, Cheng-Yi PENG, Yin-Pin WANG, Kuo-Feng YU, Da-Wen LIN, Jian-Hao CHEN, Shahaji B. More
  • Publication number: 20200060096
    Abstract: The present disclosure discloses a lighting device for plant growth, comprising: a lamp, a lifting mechanism, at least two sensing mechanisms and a control mechanism. A light-emitting module is disposed on the bottom surface of the lamp and two ends of the lifting mechanism are coupled to the top surface of the lamp and the control mechanism respectively. Each sensing mechanisms is disposed at the bottom of the lamp. The control mechanism comprises a timing module. When the sensing mechanisms operate that form a signal sensing path and sense a plant to generate a sensing signal, the control mechanism may drive the lifting mechanism according to the sensing signal to control the longitudinal displacement of the lamp. Through the automatic detection and position lifting function, it is possible to provide suitable light sources for plants at different growth stages.
    Type: Application
    Filed: April 3, 2019
    Publication date: February 27, 2020
    Inventors: HSING CHEN, WEI-HAO CHEN, HSUN-YU SHIH
  • Patent number: 10573778
    Abstract: The present disclosure provides a semiconductor device including a carrier; a current blocking layer, formed on the carrier; a function structure, formed on the current blocking layer and comprising a surface opposite to the current blocking layer; a protective structure, formed on the function structure and exposing a portion of the surface; and an electrode, formed on the protective structure and exposing the portion of the surface.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: February 25, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chih-Hao Chen, Yi-Lun Chou, Wei-Chih Peng
  • Patent number: 10574193
    Abstract: The present invention provides a class AB amplifier, wherein the class AB amplifier includes a cascode stage with a filter and an output stage. The cascode stage with the filter is arranged for receiving an input signal to generate a first driving signal and a second driving signal, wherein the filter filters the input signal to generate an filtered input signal, and at least one of the first driving signal and the second driving signal is generated according to the filtered input signal. The output stage is coupled to the cascode stage, and is arranged for generating an output signal according to the first driving signal and the second driving signal.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 25, 2020
    Assignee: MEDIATEK INC.
    Inventors: Jui-Yu Hsu, Yuan-Fu Lyu, Sheng-Hao Chen
  • Patent number: 10573000
    Abstract: The present disclosure is directed to a method and device for managing medical data. The method may include receiving medical image data of a plurality of patient cases acquired by at least one image acquisition device. The method may further include determining diagnosis results, by a processor, of the medical image data using an artificial intelligence method. The method may also include determining, by the processor, priority scores for the medical image data based on the respective diagnosis results, and sorting, by the processor, the medical image data based on the priority score. The method may yet further include presenting a queue of the medical image data on a display according to the sorted order.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: February 25, 2020
    Assignee: Beijing Curacloud Technology Co., Ltd.
    Inventors: Hanbo Chen, Hao Chen, Youbing Yin, Shanhui Sun, Qi Song
  • Patent number: 10569230
    Abstract: An air-impermeable water vapor transport membrane comprises an active layer on a microporous polymeric substrate. The active layer comprises a polyethylene-oxide containing copolymer and a polar protic solvent in an amount of about 3% to about 100% of copolymer weight in the active layer. Molecules of the protic solvent are bonded to the copolymer. The polar protic solvent reduces temperature-dependent variability in the water-vapor permeability of the membrane.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: February 25, 2020
    Assignee: CORE Energy Recovery Solutions Inc.
    Inventors: Ryan Nicholas Huizing, Hao Chen, Frankie Kin Bong Wong
  • Publication number: 20200057528
    Abstract: A touch module includes a touch panel unit, a conductive adhesive layer and a circuit board. The touch panel unit includes a substrate, a touch sensing structure disposed on the substrate, a signal transmitting structure disposed on the substrate and electrically connected to the touch sensing structure, and a protection layer covering a part of a surface of the signal transmitting structure. The protection layer and the substrate are disposed at two opposite sides of the signal transmitting structure. The conductive adhesive layer has a main portion which covers a region of the signal transmitting structure on which the protection layer is not disposed, and a cover portion which extends from the main portion and covers the protection layer. The circuit board is disposed on the conductive adhesive layer, and the circuit board and the signal transmitting structure are disposed at two opposite sides of the conductive adhesive layer.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 20, 2020
    Inventors: Qi-Bin LIU, You-Zhi SHE, Kuo-Lung FANG, Jun-Rong CHEN, Shih-Hao CHEN, Jun-Ping YANG, Xiao-Xia YOU, Qi-Jun ZHENG, Jun-Jie ZHENG
  • Publication number: 20200057478
    Abstract: A control method for data storage system includes obtaining a correlation coefficient corresponding to storage devices using a control device, and adjusting the link speed of one of the storage devices using the control device.
    Type: Application
    Filed: December 12, 2018
    Publication date: February 20, 2020
    Inventors: Cheng Kuang HSIEH, Kai Sheng CHEN, Chia Ming TSAI, Yi-Hao CHEN
  • Publication number: 20200058994
    Abstract: An apparatus for electromagnetic interference shielding is described herein. The apparatus includes an electromagnetic bandgap (EBG) structure. The EBG structure is attached to a surface of the apparatus such that noise propagation is mitigated. The apparatus may be a chassis of an electronic device, and the EBG structure may be attached to one surface of the chassis. Further, the apparatus may be a heat sink, and the EBG structure can be attached to one surface of the heat sink.
    Type: Application
    Filed: August 30, 2019
    Publication date: February 20, 2020
    Applicant: Intel Corporation
    Inventor: Chung-Hao Chen
  • Publication number: 20200058681
    Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Inventors: Wei-An Lai, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen
  • Publication number: 20200052089
    Abstract: A method includes depositing a silicon layer on a plurality of strips. The silicon layer is etched back to remove top portions of the silicon layer, and to expose some portions of the plurality of strips. Some bottom portions of the silicon layer at bottoms of trenches between the plurality of strips remain after the etching back. A germanium layer is selectively grown from remaining portions of the silicon layer, and exposed portions of the plurality of strips remain exposed after the germanium layer is selectively grown.
    Type: Application
    Filed: October 17, 2019
    Publication date: February 13, 2020
    Inventors: De-Wei Yu, Chien-Hao Chen, Ziwei Fang, Yee-Chia Yeo
  • Publication number: 20200048283
    Abstract: The present invention provides a composition for substrate surface modification and a method using the same, and the composition for substrate surface modification is composed of a compound of the general formula structure shown in formula 1: wherein n1 is an integer of 1 to 6, and R is a zwitterionic group. The composition for substrate surface modification uses water as a medium to perform modifying reaction over a substrate surface, and at the same time has biological modification characteristics, and abilities of immobilizing biomolecules and anti-biofouling.
    Type: Application
    Filed: August 5, 2019
    Publication date: February 13, 2020
    Inventors: Chen-Han HUANG, Wen-Hao CHEN, Hsing-Ying LIN
  • Publication number: 20200050733
    Abstract: A semiconductor apparatus includes a first cell having a first interconnect structure and a second cell having a second interconnect structure. The semiconductor apparatus further includes a first plurality of conductive segments, wherein each conductive segment of the first plurality of conductive segments directly connects a first metal level of the first interconnect structure to a first metal level of the second interconnect structure. The semiconductor apparatus further includes a third cell having a third interconnect structure and a fourth cell having a fourth interconnect structure. The semiconductor apparatus further includes a second plurality of conductive segments, wherein each conductive segment of the second plurality of conductive segments directly connects a second metal level of the third interconnect structure to a second metal level of the fourth interconnect structure, and the second metal level is different from the first metal level.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Prasenjit RAY, Lee-Chung LU, Meng-Kai HSU, Wen-Hao CHEN, Yuan-Te HOU
  • Patent number: 10560510
    Abstract: In certain embodiments, a network edge device comprises a memory storage, a networking component configured to communicate with a mobile device and a database comprising application attributes, and a processor. The processor, in certain embodiments, is located within the network edge device and is operable to receive application traffic from the mobile device (the application traffic being associated with an application), classify the application traffic by associating the application traffic with an application ID, and send a query comprising the application ID to the database comprising application attributes. In addition, the processor, in certain embodiments, is operable to receive a response, from the database comprising application attributes, comprising one or more application attributes associated with the application, wherein the response is based in part on the application ID, and to enforce a policy based in part on the application attribute.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: February 11, 2020
    Assignee: CA, Inc.
    Inventors: Qing Li, Min Hao Chen, Haibiao Fan, Wenjing Wang
  • Patent number: 10559492
    Abstract: Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over a target layer, forming a plurality of spacers over the first mask layer, and forming a second mask layer over the plurality of spacers and patterning the second mask layer to form a first opening, where in a plan view a major axis of the opening extends in a direction that is perpendicular to a major axis of a spacer of the plurality of spacers. The method also includes depositing a sacrificial material in the opening, patterning the sacrificial material, etching the first mask layer using the plurality of spacers and the patterned sacrificial material, etching the target layer using the etched first mask layer to form second openings in the target layer, and filling the second openings in the target layer with a conductive material.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: February 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Wen-Yen Chen, Chih-Hao Chen
  • Patent number: 10559717
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer formed on the first semiconductor layer, and an active layer formed therebetween, wherein the first semiconductor layer includes a surrounding exposed region not covered by the active layer, and the surrounding exposed region surrounds the active layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surrounding exposed region of the first semiconductor layer; an electrode layer formed on the first conductive region in the surrounding exposed region; an outside insulating layer covering a portion of the conductive layer and the electrode layer, and including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate, w
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: February 11, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Teng Ko, Chao-Hsing Chen, Jia-Kuen Wang, Yen-Liang Kuo, Chih-Hao Chen, Wei-Jung Chung, Chih-Ming Wang, Wei-Chih Peng, Schang-Jing Hon, Yu-Yao Lin
  • Patent number: 10555691
    Abstract: A vital signs detecting device and a method for detecting vital signs are provided. The vital signs detecting device comprises a detection unit; a multimode optical fiber configured to be connected to a light source and to the detection unit; a mechanical structure configured for receiving a pressure exerted by a person's body as a result of one or more of a group consisting of a movement of the person's body, a respiratory action of the person's body and a heart beat action of the person's body and to cause microbending of the multimode optical fiber under the exerted pressure and; wherein the multimode optical fiber is disposed between first and second sets of microbending elements of the mechanical structure substantially in a direction of the exerted pressure.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: February 11, 2020
    Assignee: Agency for Science Technology and Research
    Inventors: Zhi Hao Chen, Ju Teng Teo, Xiufeng Yang