Abstract: The present invention provides a termination electrode composite, comprising a ceramic material, a metal material, a resin and an organic solvent, wherein based on the total amount of the termination electrode composite, the ceramic material is in an amount of 4 weight percent to 12 weight percent, and the metal material is in an amount of 63 weight percent to 71 weight percent. The termination electrode composite of the present invention warrants the multilayer ceramic electronic component using the same have good densification of the termination electrodes and the advantages of simplifying the manufacturing process and being cost-effective. The present invention further provides a multilayer ceramic electronic component with good connection between the internal electrodes and the termination electrodes, and a manufacturing method thereof, which comprises a co-sintering step resulting in the advantages of simplifying the manufacturing process and being cost-effective.

Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.

Abstract: The present disclosure relates to a stator of a magnetic levitation bearing, a magnetic levitation bearing, and a compressor. The stator of the magnetic levitation bearing includes a stator core (4), a stator coil (5) wound around the stator core (4), a housing (2) sleeved outside the stator core (4) and having a clearance fit or a transition fit with the stator core (4), and a potting component (3) filled between the housing (2) and the stator core (4).

Abstract: Disclosed are a cross-flow air duct and an air outlet device. The cross-flow air duct includes a volute and a volute tongue. The volute includes a first body, a first side of the first body is an air inlet side, and a second side of the first body is an air outlet side. The volute tongue includes a second body, a first side of the second body is an air inlet side, and a second side of the second body is an air outlet side. An air inlet port is formed between the first sides, and an air outlet port is formed between the second sides. According to the cross-flow air duct, multiple groups of air outlet areas in different directions are formed, the air outlet width is enlarged as a whole, and the air supply range is increased.

Abstract: Provided is a semiconductor light emitting device capable of performing bonding of a phosphor plate and a light emitting element in the atmosphere by surface activated bonding. A semiconductor light emitting device includes a light emitting element including a semiconductor light emitting layer, and a phosphor plate bonded to the light emitting element. A buffer layer formed of a dielectric that transmits light emitted by the light emitting element is disposed between the light emitting element and the phosphor plate. The light emitting element and the phosphor plate are bonded with the buffer layer interposed therebetween. The buffer layer is amorphous.

Abstract: A test fixture assembly is for performing a test of a DUT (Device under Test), the DUT includes a plurality of pins exposed on a surface of the DUT, and the test fixture assembly includes a circuit board and a socket unit. The circuit board includes a plurality of test pads, which are exposed on a surface of the circuit board. The socket unit includes a socket base and a plurality of socket probes, which are inserted through the socket base. A first end and a second end of each of the socket probes are respectively exposed on two opposite surfaces of the socket base. Each of the test pads, a corresponding one of the socket probes and a corresponding one of the pins are configured to be linearly arranged along a socket probe direction.

Abstract: An antenna test assembly includes a DUT (Device under Test). The DUT includes an antenna module and a circuit board. The antenna module includes a first antenna element, which includes a first antenna pin and a second antenna pin. The circuit board includes a first line and a second line, and two ends of each of the first line and the second line are electrically connected to two metal pads, respectively, exposed on the circuit board. When the antenna test assembly is in an equipment test mode, the first line, the first antenna pin, the second antenna pin and the second line are electrically connected in sequence.

Abstract: A stacked body is formed by polishing an upper surface of a light emitting element plate, polishing a lower surface of a phosphor plate, mounting the phosphor plate on a light emitting element, and applying heat and applying pressure. From the phosphor plate side, incisions are inserted into the stacked body at positions corresponding to gaps between a plurality of semiconductor light emitting layers. From the light emitting element side, notches are formed in the stacked body at the gaps between the plurality of semiconductor light emitting layers. A semiconductor light emitting device is individualized by dividing the stacked body between a tip of the incision and a tip of the notch. One of the incision and the notch is formed with a depth extending beyond a bonding surface between the phosphor plate and the light emitting element plate.

Abstract: A method for evaluating productivity of a heterogeneous gas reservoir considering interlayer crossflow is disclosed in the invention, and includes: (1) dividing a heterogeneous gas reservoir into multiple reservoir sections along the depth of the heterogeneous gas reservoir; (2) obtaining the productivity of each reservoir section according to data obtained through wireline formation test; (3) superimposing the productivity of all reservoir sections based on the water-electricity similarity principle to obtain the superimposed productivity of the heterogeneous gas reservoir; and (4) using an interlayer crossflow correction coefficient considering influence caused by the interlayer crossflow to obtain the corrected productivity of the heterogeneous gas reservoir.

Abstract: A light-emitting device includes a substrate, a frame body, a light-emitting element, a wavelength converter, and a light reflecting portion. The light-emitting element includes a semiconductor light-emitting layer on a support substrate. The wavelength converter is disposed on an upper surface of the light-emitting element. The light reflecting portion covers side surfaces of the light-emitting element and the wavelength converter and is formed of a translucent resin containing light reflective particulate fillers. The light reflecting portion includes a first region extending along an upper surface of the light reflecting portion, a second region that is disposed under the first region and has a content rate of the particulate fillers lower than a content rate of the first region, and a third region that is disposed under the second region and has a content rate of the particulate fillers lower than the content rate of the second region.

Abstract: A self-timed readout driver for a leakage-based physical unclonable function (L-PUF) device, a L-PUF array using the same, and applications thereof are provided. The self-timed readout driver includes a precharge transistor, an inverter and a leaky device. The precharge transistor has a control end, a first end and a second end. The inverter is electrically connected to the second end of the precharge transistor. The leaky device having a control end electrically connected to ground, a first end electrically connected to the second end of the precharge transistor, and a second end electrically connected to ground. The control end of the precharge transistor is configured to receive an input signal. The inverter is configured to generate a sense enable (SE) signal. The input signal and the SE signal may be used as two input signals for the L-PUF device.

Abstract: A leakage-based physical unclonable function (L-PUF) device, a L-PUF array and applications thereof are provided. The L-PUF device includes a precharge circuit, two leaky devices and a sense amplifier. The two leaky devices are electrically connected to the precharge circuit respectively. Each leaky device includes a transistor having a control end electrically connected to ground, a first end electrically connected to the precharge circuit and a second end electrically connected to ground. The sense amplifier is electrically connected to the first end of each of the two leaky devices, and may generate a first output signal and a second output signal. The sense amplifier may switch between a first state and a second state based on a voltage difference between the first leaky device and the second leaky device, which is determined by a leakage current of the first leaky device and a leakage current of the second leaky device.

Abstract: The present invention provides a termination electrode composite, comprising a ceramic material, a metal material, a resin and an organic solvent, wherein based on the total amount of the termination electrode composite, the ceramic material is in an amount of 4 weight percent to 12 weight percent, and the metal material is in an amount of 63 weight percent to 71 weight percent. The termination electrode composite of the present invention warrants the multilayer ceramic electronic component using the same have good densification of the termination electrodes and the advantages of simplifying the manufacturing process and being cost-effective. The present invention further provides a multilayer ceramic electronic component with good connection between the internal electrodes and the termination electrodes, and a manufacturing method thereof, which comprises a co-sintering step resulting in the advantages of simplifying the manufacturing process and being cost-effective.

Abstract: Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS) proximate the first inductor comprising one or more portions and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. The semiconductor device also has a configuration including a first inductor on a first side of the PGS, a second inductor on a second side of the PGS and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. Selective coupling of portions of the PGS by activating or deactivating switches alters the behavior of the first inductor, or the behavior and interaction between the first inductor and the second inductor. A mechanism is thus provided for selectively configuring a PGS to control inductive or other properties of a circuit.

Abstract: Semiconductor devices and methods of formation are provided herein. A semiconductor device includes a first inductor, a patterned ground shielding (PGS) proximate the first inductor comprising one or more portions and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. The semiconductor device also has a configuration including a first inductor on a first side of the PGS, a second inductor on a second side of the PGS and a first switch configured to couple a first portion of the PGS to a second portion of the PGS. Selective coupling of portions of the PGS by activating or deactivating switches alters the behavior of the first inductor, or the behavior and interaction between the first inductor and the second inductor. A mechanism is thus provided for selectively configuring a PGS to control inductive or other properties of a circuit.

Abstract: A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.

Abstract: A circuit board, comprising a multi-layer circuit board, a first conductive circuit, a first circuit layer, an adhesion promoter layer, a second conductive circuit, and a second circuit layer. The multi-layer circuit board comprises an inner circuit and an opening. The opening exposes the inner circuit. The first conductive circuit is disposed in the opening and on the inner circuit. The first circuit layer is disposed on the first conductive circuit in the opening and lower than the depth of the opening. The adhesion promoter layer is disposed in the opening and on the surface of the multi-layer circuit board and connected to the first conductive circuit. The second conductive circuit is disposed on the adhesion promoter layer and on the first circuit layer in the opening. The second circuit layer is disposed on the second conductive circuit in the opening and on the second conductive circuit.

Abstract: A method for training a cross-domain classifier includes the following steps: (a) obtaining training samples from a first database and test samples from a second database; (b) performing an inference procedure to the test samples by the classifier to generate corresponding predicted labels; (c) for a certain category, obtaining the training samples and the test samples belonging to this category, and training an generative adversarial network (GAN) according to the obtained training samples and test samples; (d) performing a style conversion to the obtained training samples by the GAN to obtain synthetic samples; (e) merging the synthetic samples with the training samples to train the classifier; and repeating the above steps (b) to (e). The classifier will be suitable for cross-domain databases based on this iterative procedure.

Abstract: An assembling structure for assembling a connector on a frame is provided. The assembling structure includes a front bracket, a rear bracket, and a plurality of assembling parts. The front bracket and the rear bracket are disposed on opposite sides of the frame, and the assembling parts are configured to assemble the front bracket and the rear bracket. The frame has an upper frame and a lower frame, the connector is arranged between the upper frame and the lower frame by combining the front bracket, the rear bracket, and the assembling parts, and the positions of the front bracket, the rear bracket and the connector on the frame are adjustable.

Abstract: A semiconductor device including a substrate having a NMOS region and a PMOS region; a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate; a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region; a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region; a first contact plug landing on the second source/drain region adjacent to one side of the metal gate; a second contact plug landing on the second source/drain region adjacent to another side of the metal gate; and a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the first contact plug and the second contact plug.