Abstract: Disclosed are a molecular detection system and a detection method thereof. The molecular detection system includes a main control device and a plurality of molecular detection devices. The main control device communicates with each of the plurality of molecular detection devices. The main control device is configured to control each of the plurality of molecular detection devices to perform detection. The main control device includes a display module configured to display detection data of each of the plurality of molecular detection devices. The molecular detection devices may perform different types of detections on different types of samples, which greatly expands the application flexibility and the application scenarios while meeting the detection throughput.

Abstract: The present disclosure provides methods and systems for image enhancement. The methods may include obtaining an initial image. The methods may include obtaining a first image and a second image by performing speckle noise reduction and edge enhancement on the initial image, respectively. The methods may further include determining a target image by performing a fusion operation on the first image and the second image.

Abstract: The present disclosure discloses methods, systems, and computer readable mediums for ultrasonic imaging. The method may include determining a target imaging mode according to information related to one or more imaging demands. The method may further include obtaining a target imaging result by performing an imaging operation according to the target imaging mode, wherein the one or more imaging demands may at least include a demand related to an imaging quality and/or a frame rate, the target imaging mode may include a first target imaging mode and/or a second target imaging mode, the first target imaging mode may be configured to perform an optimized imaging for a local imaging region, and/or the second target imaging mode may be configured to utilize a hybrid wave with at least two transmission beam types and/or at least two transmission frequencies for imaging.

Abstract: A method for growing a transition metal dichalcogenide layer involves arranging a substrate having a first transition metal contained pad is arranged in a chemical vapor deposition chamber. A chalcogen contained precursor is arranged upstream of the substrate in the chemical vapor deposition chamber. The chemical vapor deposition chamber is heated for a period of time during which a transition metal dichalcogenides layer, containing transition metal from the first transition metal contained pad and chalcogen from the chalcogen contained precursor, is formed in an area adjacent to the first transition metal contained pad.

Abstract: A method for growing a transition metal dichalcogenide layer involves arranging a substrate having a first transition metal contained pad is arranged in a chemical vapor deposition chamber. A chalcogen contained precursor is arranged upstream of the substrate in the chemical vapor deposition chamber. The chemical vapor deposition chamber is heated for a period of time during which a transition metal dichalcogenides layer, containing transition metal from the first transition metal contained pad and chalcogen from the chalcogen contained precursor, is formed in an area adjacent to the first transition metal contained pad.

Abstract: A device comprising: at least one first layer, such as a graphene layer, at least one second layer of transition metal dichalcogenide, wherein the at least one first layer and the at least one second layer of transition metal dichalcogenide form at least one heterojunction. The first and second layers are laterally displaced but may overlap over a length of 0 nm to 500 nm. A low-resistance contact is formed. The device can be a transistor including a field effect transistor. The layers can be formed by chemical vapor deposition. The graphene can be heavily p-doped. Transistor performance data are described.

Abstract: A device comprising: at least one first layer, such as a graphene layer, at least one second layer of transition metal dichalcogenide, wherein the at least one first layer and the at least one second layer of transition metal dichalcogenide form at least one heterojunction. The first and second layers are laterally displaced but may overlap over a length of 0 nm to 500 nm. A low-resistance contact is formed. The device can be a transistor including a field effect transistor. The layers can be formed by chemical vapor deposition. The graphene can be heavily p-doped. Transistor performance data are described.

Abstract: A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.

Abstract: A vertical transistor includes a source-channel-drain structure, a gate and a gate dielectric layer. The source-channel-drain structure includes a source, a drain over the source and a channel between the source and the drain. The gate surrounds a portion of the channel. The gate is configured to provide compressive strain substantially along an extending direction of the channel when the vertical transistor is an n-channel vertical transistor, or the gate is configured to provide tensile strain substantially along the extending direction of the channel when the vertical transistor is a p-channel vertical transistor. In some embodiments, the vertical transistor further includes an ILD configured to provide tensile strain substantially along an extending direction of the channel when the vertical transistor is an n-channel vertical transistor, or configured to provide compressive strain substantially along an extending direction of the channel when the vertical transistor is a p-channel vertical transistor.

Abstract: A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.

Abstract: A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.

Abstract: A fastener includes a head portion and a shank portion that extends from the head portion. The shank portion has a distal end that is distal from the head portion and that is formed with at least two bendable anchor segments. The fastener is used to fasten a base plate of a light emitting bar to a base of a light source module.

Abstract: A vertical transistor includes a source-channel-drain structure, a gate and a gate dielectric layer. The source-channel-drain structure includes a source, a drain over the source and a channel between the source and the drain. The gate surrounds a portion of the channel. The gate is configured to provide compressive strain substantially along an extending direction of the channel when the vertical transistor is an n-channel vertical transistor, or the gate is configured to provide tensile strain substantially along the extending direction of the channel when the vertical transistor is a p-channel vertical transistor. In some embodiments, the vertical transistor further includes an ILD configured to provide tensile strain substantially along an extending direction of the channel when the vertical transistor is an n-channel vertical transistor, or configured to provide compressive strain substantially along an extending direction of the channel when the vertical transistor is a p-channel vertical transistor.

Abstract: A semiconductor device includes a substrate, a first source/drain (S/D) region, a second S/D region, and a semiconductor sheet. The first S/D region is disposed on the substrate. The second S/D region is disposed above the first S/D region. The semiconductor sheet interconnects the first and second S/D regions and includes a plurality of turns. A method for fabricating the semiconductor device is also disclosed.

Abstract: A fastener includes a head portion and a shank portion that extends from the head portion. The shank portion has a distal end that is distal from the head portion and that is formed with at least two bendable anchor segments. The fastener is used to fasten a base plate of a light emitting bar to a base of a light source module.

Abstract: In one embodiment, a method includes determining a first display position for each of a plurality of images and displaying the images at the corresponding first display position, receiving first plurality of taps, associating each of the first plurality of taps with a corresponding image, to produce a first tapping pattern, storing the first tapping pattern, which includes the first plurality of taps and the corresponding images in an associated relationship, determining a second display position for each of the images and displaying the images at the corresponding second display positions, receiving second plurality of taps, associating each of the second plurality of taps with a corresponding image, which are displayed at the second display positions, to produce a second tapping pattern, determining whether the second tapping pattern matches the first tapping pattern, and changing an access state of the electronic device in response to determining a match.

Abstract: A process for making caspofungin acetate comprising the steps of: A. selectively dehydrating pneumocandin Bo to obtain a nitrile; B. reducing the nitrile to primary amine; C. reacting the primary amine with an arylthiol in a suitable solvent to obtain a thioether; and D.

Abstract: Inductively coupled antennas and methods of designing the same are disclosed. Electrically small antennas having relatively high efficiency and relatively broad bandwidth may be formed by inductively coupling an antenna loop to at least one antenna winding. Such antennas may be substantially planar. Various operating characteristics of such antennas may be adjustable by and/or dependent upon the strength of the inductive coupling between an antenna winding and an antenna loop.

Abstract: Inductively coupled antennas and methods of designing the same are disclosed. Electrically small antennas having relatively high efficiency and relatively broad bandwidth may be formed by inductively coupling an antenna loop to at least one antenna winding. Such antennas may be substantially planar. Various operating characteristics of such antennas may be adjustable by and/or dependent upon the strength of the inductive coupling between an antenna winding and an antenna loop.

Abstract: The use of a genetic algorithm (GA) to design patch shapes of microstrip antennas for multi-band applications is disclosed. A full-wave electromagnetic solver is used to predict the performance of microstrip antennas with arbitrary patch shapes. Two-dimensional chromosomes are used to encode each patch shape into a binary map. GA with two-point crossover and geometrical filtering is implemented to achieve efficient optimization. The GA-optimized designs are built on a solid substrate (e.g., FR-4). The patch shape may be further optimized to broaden the bandwidth at one or more of the frequencies. In addition to multi-band operation in frequency, designs based on other objectives, including size miniaturization and/or circular polarization are disclosed.