Patents by Inventor Hao Wu

Hao Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113615
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Inventors: Chun-Hao HUANG, Chun-Wei LIN, I-Hsiang SHIH, Ching-Nan WU, Jia-Wei YEH
  • Publication number: 20240114632
    Abstract: A circuit board structure is provided. The circuit board structure includes a via hole, a conductive layer, and an alternate stacking of a plurality of circuit layers and a plurality of insulating layers. The via hole penetrates through the plurality of circuit layers and the plurality of insulating layers. The lateral ends of the plurality of insulating layers form the sidewall of the via hole. The conductive layer is conformally disposed within the via hole. The conductive layer exposes the first region of the sidewall and covers the second region of the sidewall. The sidewall extends in the longitudinal direction of the via hole and has no misalignments in the radial direction.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 4, 2024
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Ming-Hao WU, Chia-Ching WANG
  • Publication number: 20240113143
    Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Cheng Yu Huang, Wen-Hau Wu, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chih-Kung Chang
  • Publication number: 20240114511
    Abstract: Provided are a control channel monitoring method and apparatus, an information element transmission method and apparatus, a device, and a storage medium Whether H first-type control channel elements include the same control channel information can be determined according to signaling information and/or a preset rule, where H is a positive integer greater than or equal to 2; and a control channel is monitored according to a determination result.
    Type: Application
    Filed: December 12, 2023
    Publication date: April 4, 2024
    Inventors: Shujuan ZHANG, Zhaohua LU, Chuangxin JIANG, YuNgok LI, Bo GAO, Hao WU, Zhen HE
  • Publication number: 20240112299
    Abstract: This disclosure relates to a video cropping method and apparatus, storage medium, and electronic device. The present disclosure method: acquiring an original video to be cropped; performing frame extraction processing on the original video to obtain a plurality of target video frames; determining, for each of the target video frames, a target candidate cropping box corresponding to the target video frame according to a main content in the target video frame; performing interpolation processing according to the target candidate cropping box corresponding to each of the target video frames to determine a target cropping box corresponding to each frame picture in the original video; and cropping the original video according to the target cropping box corresponding to the each frame picture.
    Type: Application
    Filed: December 1, 2021
    Publication date: April 4, 2024
    Inventors: Hao WU, Changhu WANG
  • Publication number: 20240112928
    Abstract: A trimming method is provided. The trimming method includes the following steps. A first wafer including a substrate and a device layer over a first side of the substrate is provided. The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. An edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: An-Hsuan Lee, Chen-Hao Wu, Chun-Hung Liao, Huang-Lin Chao
  • Publication number: 20240113326
    Abstract: The present disclosure provides a vanadium electrolyte, a preparation method and use thereof.
    Type: Application
    Filed: June 22, 2023
    Publication date: April 4, 2024
    Inventors: Xiongwei WU, Hui XU, Hao XIE, Shanguang LV, Xuewen WU, Na FU
  • Publication number: 20240113036
    Abstract: An electromagnetic interference (EMI) shielding package structure, a manufacturing method thereof, and an electronic assembly are provided. The EMI shielding package structure includes a carrier, at least one chip mounted on a first board surface of the carrier, an encapsulant formed on the carrier and packaging the at least one chip, an EMI shielding layer formed on an outer surface of the encapsulant, and an insulating layer. The insulating layer includes a spraying portion and a capillary permeating portion. The spraying portion is formed at least part of an outer surface of the EMI shielding layer. The capillary permeating portion is formed by extending from a bottom end of the spraying portion toward a second board surface of the carrier through capillarity, and the capillary permeating portion covers a bottom edge of the EMI shielding layer.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 4, 2024
    Inventors: CHIH-HAO LIAO, SHU-HAN WU, HSIN-YEH HUANG
  • Patent number: 11947564
    Abstract: The present disclosure relates to blockchain-based data processing methods and devices to achieve balance between a service need and system resource consumption. In one example method, an amount of service data processed by consensus in a blockchain in a specified time period is monitored. A determination is made as to whether the monitored amount of processed service data in the specified time period is less than a specified first threshold or more than a specified second threshold. In response to determining that the monitored amount of processed service data in the specified time period is less than the specified first threshold or more than the specified second threshold, a block generation time for the blockchain is dynamically adjusted. A new block in the blockchain is then dynamically adjusted based on the adjusted block generation time.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 2, 2024
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Hao Wu
  • Patent number: 11950186
    Abstract: Techniques are described to enable a user equipment (UE) to save power consumption and/or can enable the UE to acquire the channel state in time without reducing the UE's data transmission efficiency. An example technique includes determining, by the communication device, an operating mode based on a first signaling, and operating the communication device in the operating mode, where the operating mode includes any one of a normal mode, a first power saving mode, a second power saving mode, a third power saving mode, or a fourth power saving mode.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: April 2, 2024
    Assignee: ZTE Corporation
    Inventors: Xiaoying Ma, Jun Xu, Mengzhu Chen, Hao Wu, Qiujin Guo, Xuan Ma, Focai Peng
  • Patent number: 11948278
    Abstract: An image quality improvement method and an image processing apparatus using the same are provided. Denoising filtering is performed to an original image by a filter to obtain a preliminary processing image. The preliminary processing image is input to a multi-stage convolutional network model to generate an optimization image through the multi-stage convolutional network model. The multi-stage convolutional network model includes multiple convolutional network sub-models, and these convolutional network sub-models respectively correspond to different network architectures.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: April 2, 2024
    Assignee: National Chengchi University
    Inventors: Yan-Tsung Peng, Sha-Wo Huang, Ming-Hao Lin, Chin-Hsien Wu, Chun-Lin Tang
  • Publication number: 20240103173
    Abstract: A multiplexed line scanning LiDAR system generates a line scan of an object based on the distance of various point measurements to the object. The multiplexed line scanning LiDAR utilizes at least one set of light source emissions to a fiber optic laser element to form a line scan pattern to determine a distance and velocity of an object.
    Type: Application
    Filed: June 19, 2023
    Publication date: March 28, 2024
    Inventors: Tsung-Han Tsai, Jie Jensen Hou, Hao Wu, Shanxing Su, Jiaqi Zhang
  • Publication number: 20240099465
    Abstract: A quick-assembly structure includes an inserting portion and an inserting port allowing the inserting portion to be inserted, where one of the inserting portion and the inserting port is provided on the chassis, and the other one is provided on the back frame. A locking block of the inserting portion is movably arranged relative to the inserting port; and in an assembled state, a bump of the inserting portion is inserted into the inserting port along with the inserting portion, the locking block is pushed by an elastic force of an elastic member of the inserting port to enter a locking position, and at the locking position, a locking end of the locking block enters the inserting port and abuts against an abutting surface of the bump so as to restrict the inserting portion from being pulled out in a direction opposite to an inserting direction thereof.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 28, 2024
    Applicant: SUNON TECHNOLOGY CO.,LTD
    Inventors: Xujun Zhang, Hao Wu, Changjiang Liu, Xianping He, Aijun Qian, Haibo Lu
  • Publication number: 20240099466
    Abstract: A quick-assembly structure includes first inserting connection structures, where each of the first inserting connection structures includes an inserting and clamping member and a groove body; each of the groove bodies includes an inserting groove and a clamping groove which are in communication with each other, the corresponding inserting and clamping member is inserted into the inserting groove in a vertical direction and then horizontally slides into the clamping groove in a first direction; and the seat cushion is further provided with elastic buckles, the chassis includes a clamping connection surface, and when the inserting and clamping members slide to predetermined positions in the clamping grooves, the elastic buckles are clamped with the clamping connection surface of the chassis in an abutting manner so as to restrict the chassis from sliding relative to the seat cushion in a direction opposite to the first direction.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 28, 2024
    Applicant: SUNON TECHNOLOGY CO.,LTD
    Inventors: Xujun Zhang, Hao Wu, Changjiang Liu, Xianping He, Aijun Qian, Xiubing Du
  • Publication number: 20240106565
    Abstract: Apparatus, methods, and computer-readable media for network coding for handover are disclosed herein. A base station (BS) transmits a first group of encoded packets to a first road side unit (RSU) over a first radio access network (RAN) interface. The BS initiates a handover procedure between the first RSU and a second RSU. The BS receives, from the first RSU, a release acknowledgment associated with the handover procedure and feedback associated with the first group of encoded packets. The BS transmits network coding level information to the second RSU over a second RAN interface based on the feedback. The network coding level information indicates a number of missing encoded packets within the first group of encoded packets for the second RSU to transmit to the UE. The BS transmits, to the UE, a second group of encoded packets associated with the number of missing encoded packets at the second RSU.
    Type: Application
    Filed: February 10, 2021
    Publication date: March 28, 2024
    Inventors: Kangqi LIU, Ruiming ZHENG, Changlong XU, Liangming WU, Kexin XIAO, Jian LI, Hao XU, Wei LIU
  • Publication number: 20240102860
    Abstract: An apparatus includes a six-axis correction stage, an auto-collimation measurement device, a light splitter, a telecentric image measurement device, and a controller. The six-axis correction stage carries a device under test; the auto-collimation measurement device is arranged above the six-axis correction stage along a measurement optical axis; the light splitter is arranged on the measurement optical axis and is interposed between the six-axis correction stage and the auto-collimation measurement device. A method controls the six-axis correction stage to correct rotation errors in at least two degrees of freedom of the device under test according to a measurement result of the auto-collimation measurement device, and controls the six-axis correction stage to correct translation and yaw errors in at least three degrees of freedom of the device under test according to a measurement result of the telecentric image measurement device by means of the controller.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Cheng Chih HSIEH, Tien Chi WU, Ming-Long LEE, Yu-Hsuan LIN, Tsung-I LIN, Chien-Hao MA
  • Patent number: 11940659
    Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chia-Ping Lai
  • Patent number: 11940701
    Abstract: A writing panel includes an array substrate, a flexible substrate disposed opposite to the array substrate, a liquid crystal layer disposed between the array substrate and the flexible substrate, and a plurality of spacers each in a shape of a column disposed on a surface of the array substrate proximate to the liquid crystal layer. The array substrate includes a base and a pixel driving circuit layer disposed on the base, and the pixel driving circuit layer includes a plurality of thin film transistors and a plurality of signal lines. An orthographic projection of each spacer on the base is non-overlapping with orthographic projections of the plurality of thin film transistors and the plurality of signal lines on the base.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: March 26, 2024
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaojuan Wu, Jiaxing Wang, Yang Ge, Yu Zhao, Jian Wang, Hao Yan
  • Patent number: 11939677
    Abstract: A coated metal alloy substrate with at least one chamfered edge, a process for producing a coating a metal alloy substrate, and an electronic device having a housing comprising a coated metal alloy substrate are described. The coated metal alloy substrate with at least one chamfered edge comprises a hydrophobic anti-fingerprint layer deposited on the metal alloy substrate, a passivation layer deposited on the at least one chamfered edge, and a water based paint layer deposited on the passivation layer.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 26, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Ting Wu, Chi Hao Chang, Hsing-Hung Hsieh
  • Patent number: 11942373
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chu-An Lee, Chen-Hao Wu, Peng-Chung Jangjian, Chun-Wen Hsiao, Teng-Chun Tsai, Huang-Lin Chao