Patents by Inventor Haoyu Li
Haoyu Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210383516Abstract: Systems and methods for image processing are provided in the present disclosure. The systems may generate a preliminary image by filtering image data generated by an image acquisition device. The system may generate an intermediate image by performing, based on a first objective function, a first iterative operation on the preliminary image. The first objective function may include a first term associated with a first difference between the intermediate image and the preliminary image, a second term associated with continuity of the intermediate image and a third term associated with sparsity of the intermediate image. The systems may also generate a target image by performing, based on a second objective function, a second iterative operation on the intermediate image. The second objective function may be associated with a system matrix of the image acquisition device and a second difference between the intermediate image and the target image.Type: ApplicationFiled: July 2, 2021Publication date: December 9, 2021Applicant: GUANGZHOU COMPUTATIONAL SUPER-RESOLUTION BIOTECH CO., LTD.Inventors: Liangyi CHEN, Haoyu LI, Weisong ZHAO, Xiaoshuai HUANG
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Patent number: 11189016Abstract: Systems and methods for image processing are provided in the present disclosure. The systems may generate a preliminary image by filtering image data generated by an image acquisition device. The system may generate an intermediate image by performing, based on a first objective function, a first iterative operation on the preliminary image. The first objective function may include a first term associated with a first difference between the intermediate image and the preliminary image, a second term associated with continuity of the intermediate image and a third term associated with sparsity of the intermediate image. The systems may also generate a target image by performing, based on a second objective function, a second iterative operation on the intermediate image. The second objective function may be associated with a system matrix of the image acquisition device and a second difference between the intermediate image and the target image.Type: GrantFiled: July 2, 2021Date of Patent: November 30, 2021Assignee: GUANGZHOU COMPUTATIONAL SUPER-RESOLUTION BIOTECH CO., LTD.Inventors: Liangyi Chen, Haoyu Li, Weisong Zhao, Xiaoshuai Huang
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Publication number: 20210358940Abstract: Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.Type: ApplicationFiled: May 13, 2020Publication date: November 18, 2021Applicant: Micron Technology, Inc.Inventors: Yiping Wang, Andrew Li, Haoyu Li, Matthew J. King, Wei Yeeng Ng, Yongjun Jeff Hu
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Patent number: 11164873Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.Type: GrantFiled: May 23, 2019Date of Patent: November 2, 2021Assignee: Micron Technology, Inc.Inventors: Silvia Borsari, Stian E. Wood, Haoyu Li, Yiping Wang
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Patent number: 11119506Abstract: A flight control method includes obtaining route data for instructing an aircraft to fly on a route represented by the route data, analyzing the route data according to a preset splitting condition, splitting the route into multiple sub-routes in response to the route data satisfying the preset splitting condition, and determining a to-be-executed sub-route from the multiple sub-routes and transmitting the to-be-executed sub-route to the aircraft.Type: GrantFiled: March 26, 2019Date of Patent: September 14, 2021Assignee: SZ DJI TECHNOLOGY CO., LTD.Inventors: Zhuo Guo, Zhuo Xie, Haoyu Li, Wenlin Li, Ding Wang, Zebo Yang
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Publication number: 20210275837Abstract: A breathing mask is provided. The breathing mask is secured around the head of the wearer and includes a nose lifter disposed on the front face of the breathing mask. The breathing mask includes a hood, a pair of eye goggles, a mouth aperture, and a check valve disposed on the rear lace of the hood. The eye goggles are affixed to the hood with an elastic band attached in the rear of the hood. Moreover, the mouth aperture is disposed on the front face of the hood below the nose filter. The hood is secured to the head of the wearer by a zipper disposed on the rear face of the hood and an elastic band encircling a pair of side faces and a rear face of the hood. The elastic band encircling the hood provides an airtight seal to protect the wearer from airborne diseases and other hazards.Type: ApplicationFiled: March 3, 2021Publication date: September 9, 2021Inventors: Xing Li, Haoyu Li
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Publication number: 20210191785Abstract: Example methods are provided to perform an operation associated with a first host to manage a virtualized computing environment. One example method includes generating, by the management entity, a first set of infrastructure data metrics of the first host, wherein the first host is supported by infrastructure elements having a set of infrastructure constraints. The method also includes querying the first host to obtain an identification of the first host, associating the first host with the first set of infrastructure data metrics based on the identification, and determining whether a first infrastructure constraint of a first infrastructure element from the set of infrastructure constraints has been reached before performing the operation to manage the virtualized computing environment.Type: ApplicationFiled: February 11, 2020Publication date: June 24, 2021Applicant: VMware, Inc.Inventors: Yixing JIA, GUANG LU, PENGPENG WANG, HAOYU LI
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Patent number: 10916564Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.Type: GrantFiled: May 4, 2020Date of Patent: February 9, 2021Assignee: Micron Technology, Inc.Inventors: David Ross Economy, John Mark Meldrim, Haoyu Li, Yongjun Jeff Hu, Christopher W. Petz, Daniel Billingsley, Everett A. McTeer
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Publication number: 20200373304Abstract: An apparatus comprises a conductive structure, another conductive structure, and a laminate spacer structure interposed between the conductive structure and the another conductive structure in a first direction. The laminate spacer structure comprises a dielectric spacer structure, another dielectric spacer structure, and an additional dielectric spacer structure interposed between the dielectric spacer structure and the another dielectric spacer structure. The additional dielectric spacer structure comprises at least one dielectric material, and gas pockets dispersed within the at least one dielectric material. Additional apparatuses, memory devices, electronic systems, and a method of forming an apparatus are also described.Type: ApplicationFiled: May 23, 2019Publication date: November 26, 2020Inventors: Silvia Borsari, Stian E. Wood, Haoyu Li, Yiping Wang
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Publication number: 20200272591Abstract: A port circuit, method for supplying power for an electronic device via a port circuit and electronic device. The port circuit includes: power supply pins configured to connect power lines of an external device and power lines of an electronic device provided with the port circuit; data pins configured to connect data lines of the external device and data lines of the electronic device; and first switch configured to switch between switching on and turning off, so that a path for performing data exchange by the electronic device and the external device is switched on or turned off. With the method for supplying power for an electronic device via a port circuit and the electronic device, whether the electronic device exchanges data with the external device via the data pins of the port circuit is controlled by providing a switch at the port circuit, thereby guaranteeing information security of the electronic device.Type: ApplicationFiled: December 15, 2017Publication date: August 27, 2020Inventors: Yaofeng SHI, Xiaoxia SUN, Haoyu LI, Yuling LIU
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Publication number: 20200266210Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.Type: ApplicationFiled: May 4, 2020Publication date: August 20, 2020Applicant: Micron Technology, Inc.Inventors: David Ross Economy, John Mark Meldrim, Haoyu Li, Yongjun Jeff Hu, Christopher W. Petz, Daniel Billingsley, Everett A. McTeer
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Patent number: 10700091Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.Type: GrantFiled: June 4, 2019Date of Patent: June 30, 2020Assignee: Micron Technology, Inc.Inventors: David Ross Economy, John Mark Meldrim, Haoyu Li, Yongjun Jeff Hu, Christopher W. Petz, Daniel Billingsley, Everett A. McTeer
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Publication number: 20200185406Abstract: A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.Type: ApplicationFiled: December 11, 2018Publication date: June 11, 2020Inventors: Haoyu Li, Everett A. McTeer, Christopher W. Petz, Yongjun J. Hu
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Publication number: 20200053274Abstract: An imaging control method includes obtaining location point information, the location point information being determined based on angle data. The imaging control method also includes generating a control command based on the location point information, the control command including an imaging parameter. The imaging control method further includes transmitting the control command to a target device, the control command configured to control the target device to execute an imaging control process based on the imaging parameter.Type: ApplicationFiled: October 18, 2019Publication date: February 13, 2020Inventor: Haoyu LI
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Patent number: 10546848Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.Type: GrantFiled: April 30, 2019Date of Patent: January 28, 2020Assignee: Micron Technology, Inc.Inventors: Daniel Billingsley, Everett A. McTeer, Christopher W. Petz, Haoyu Li, John Mark Meldrim, Yongjun Jeff Hu
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Publication number: 20190355711Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.Type: ApplicationFiled: April 30, 2019Publication date: November 21, 2019Applicant: Micron Technology, Inc.Inventors: Daniel Billingsley, Everett A. McTeer, Christopher W. Petz, Haoyu Li, John Mark Meldrim, Yongjun Jeff Hu
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Publication number: 20190304996Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.Type: ApplicationFiled: June 4, 2019Publication date: October 3, 2019Applicant: Micron Technology, Inc.Inventors: David Ross Economy, John Mark Meldrim, Haoyu Li, Yongjun Jeff Hu, Christopher W. Petz, Daniel Billingsley, Everett A. McTeer
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Publication number: 20190221128Abstract: A flight control method includes acquiring, by a smart terminal, data of at least two flight routes. The flight control method also includes associating, by the smart terminal and based on preset information of at least two aircrafts, at least one aircraft with a flight route of the at least two flight routes. The flight control method further includes based on a result of the associating, sending, by the smart terminal, data of the flight route to the associated at least one aircraft.Type: ApplicationFiled: March 22, 2019Publication date: July 18, 2019Inventors: Zhuo GUO, Zhuo XIE, Zebo YANG, Wenlin LI, Lei WANG, Ding WANG, Haoyu LI
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Publication number: 20190220042Abstract: A flight control method includes obtaining route data for instructing an aircraft to fly on a route represented by the route data, analyzing the route data according to a preset splitting condition, splitting the route into multiple sub-routes in response to the route data satisfying the preset splitting condition, and determining a to-be-executed sub-route from the multiple sub-routes and transmitting the to-be-executed sub-route to the aircraft.Type: ApplicationFiled: March 26, 2019Publication date: July 18, 2019Inventors: Zhuo GUO, Zhuo XIE, Haoyu LI, Wenlin LI, Ding WANG, Zebo YANG
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Patent number: 10355014Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.Type: GrantFiled: December 22, 2017Date of Patent: July 16, 2019Assignee: Micron Technology, Inc.Inventors: David Ross Economy, John Mark Meldrim, Haoyu Li, Yongjun Jeff Hu, Christopher W. Petz, Daniel Billingsley, Everett A. McTeer