Patents by Inventor Harianto Wong

Harianto Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11782105
    Abstract: In one aspect, a method includes forming a coil in a coil layer, performing planarization on the coil layer, and depositing a magnetoresistance (MR) element on the planarized coil layer. No dielectric material is between the planarized coil layer and the MR element. In another aspect, a magnetic field sensor includes a substrate, a planarized coil layer comprising a coil on the substrate, a magnetoresistance (MR) element in contact with the planarized coil layer, and a capping layer deposited over the MR element and the planarized coil layer. No dielectric material is between the planarized coil layer and the MR element.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: October 10, 2023
    Assignee: Allegro MicroSystems, LLC
    Inventors: Maxim Klebanov, Yen Ting Liu, Paolo Campiglio, Sundar Chetlur, Harianto Wong
  • Publication number: 20230228828
    Abstract: In one aspect, a method includes forming a coil in a coil layer, performing planarization on the coil layer, and depositing a magnetoresistance (MR) element on the planarized coil layer. No dielectric material is between the planarized coil layer and the MR element. In another aspect, a magnetic field sensor includes a substrate, a planarized coil layer comprising a coil on the substrate, a magnetoresistance (MR) element in contact with the planarized coil layer, and a capping layer deposited over the MR element and the planarized coil layer. No dielectric material is between the planarized coil layer and the MR element.
    Type: Application
    Filed: January 17, 2022
    Publication date: July 20, 2023
    Applicant: Allegro MicroSystems, LLC
    Inventors: Maxim Klebanov, Yen Ting Liu, Paolo Campiglio, Sundar Chetlur, Harianto Wong
  • Patent number: 11630169
    Abstract: In one aspect, a method includes forming a metal layer on a substrate, wherein the metal layer comprises a first coil, forming a planarized insulator layer on the metal layer, forming at least one via in the planarized insulator layer, depositing a magnetoresistance (MR) element on the planarized insulator layer, and forming a second coil extending above the MR element. The at least one via electrically connects to the metal layer on one end and to MR element on the other end.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: April 18, 2023
    Assignee: Allegro MicroSystems, LLC
    Inventors: Yen Ting Liu, Maxim Klebanov, Paolo Campiglio, Sundar Chetlur, Harianto Wong
  • Patent number: 11327882
    Abstract: A method comprising: performing a first read from an address in a data storage module by using a first read voltage; storing, in a first register, data that is retrieved from the data storage module as a result of the first read; performing a second read from the address by using a second read voltage; storing, in a second register, data that is retrieved from the data storage module as a result of the second read; detecting whether a weak bit condition is present at the address based on the data that is stored in the first register and the data that is stored in the second register; and correcting the weak bit condition, when the weak bit condition is present at the address.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: May 10, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Muhammed Sarwar, Vyankatesh Gupta, James McClay, Sundar Chetlur, Harianto Wong, Gerardo A. Monreal, Nicolás Rafael Biberidis, Octavio H. Alpago, Nicolas Rigoni
  • Publication number: 20220137097
    Abstract: Systems and methods described herein are directed towards integrating a shield layer into a current sensor to shield a magnetic field sensing element and associated circuitry in the current sensor from electrical, voltage, or electrical transient noise. In an embodiment, a shield layer may be disposed along at least one surface of a die supporting a magnetic field sensing element. The shield layer may be disposed in various arrangements to shunt noise caused by a parasitic coupling between the magnetic field sensing element and the current carrying conductor away from the magnetic field sensing element.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Bryan Cadugan, Michael C. Doogue, Alexander Latham, William P. Taylor, Harianto Wong, Sundar Chetlur
  • Patent number: 11296247
    Abstract: An electronics module assembly for detecting photons is provided to include: a substrate layer; a buried layer deposited upon a first surface area of the substrate layer; an intrinsic layer deposited upon a first portion of a first surface area of the buried layer; a plug layer deposited upon a second portion of the first surface area of the buried layer; a p-plus layer deposited upon a first surface area of the intrinsic layer; an n-plus layer deposited upon a first surface area of the plug layer; a pre-metal dielectric (PMD) layer deposited upon the p-plus layer and n-plus layer; a first node coupled, through the PMD layer, to the p-plus layer; and a second node coupled, through the PMD layer, to the n-plus layer.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: April 5, 2022
    Inventors: Bryan Cadugan, Harianto Wong, William P. Taylor
  • Patent number: 11262385
    Abstract: Systems and methods described herein are directed towards integrating a shield layer into a current sensor to shield a magnetic field sensing element and associated circuitry in the current sensor from electrical, voltage, or electrical transient noise. In an embodiment, a shield layer may be disposed along at least one surface of a die supporting a magnetic field sensing element. The shield layer may be disposed in various arrangements to shunt noise caused by a parasitic coupling between the magnetic field sensing element and the current carrying conductor away from the magnetic field sensing element.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: March 1, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Bryan Cadugan, Michael C. Doogue, Alexander Latham, William P. Taylor, Harianto Wong, Sundar Chetlur
  • Patent number: 11217718
    Abstract: According to an embodiment of the present disclosure, a photodetector device can include a substrate layer; a bottom contacting layer disposed over a surface of the substrate layer and having a first contacting region and a second contacting region, the bottom contacting layer providing a low resistance path between the first and second contacting regions; an insulating layer disposed over a surface of the bottom contacting layer; an intrinsic region disposed within the insulating layer, the intrinsic region in electrical contact with the first contacting region of the bottom contacting layer, the intrinsic region comprising a low band-gap material; a metal contact disposed within the insulating layer and in electrical contact with the second contacting region of the bottom contacting layer; an anode in electrical contact with the intrinsic region; and a cathode in electrical contact with the metal contact.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: January 4, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Bryan Cadugan, Harianto Wong, William P. Taylor
  • Patent number: 11170858
    Abstract: A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: November 9, 2021
    Assignee: Allegro MicroSystems, LLC
    Inventors: Muhammad Sarwar, Vyankatesh Gupta, James McClay, Sundar Chetlur, Harianto Wong
  • Publication number: 20210295932
    Abstract: A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.
    Type: Application
    Filed: March 18, 2020
    Publication date: September 23, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Muhammad Sarwar, Vyankatesh Gupta, James McClay, Sundar Chetlur, Harianto Wong
  • Publication number: 20210240606
    Abstract: A method comprising: performing a first read from an address in a data storage module by using a first read voltage; storing, in a first register, data that is retrieved from the data storage module as a result of the first read; performing a second read from the address by using a second read voltage; storing, in a second register, data that is retrieved from the data storage module as a result of the second read; detecting whether a weak bit condition is present at the address based on the data that is stored in the first register and the data that is stored in the second register; and correcting the weak bit condition, when the weak bit condition is present at the address.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 5, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Muhammed Sarwar, Vyankatesh Gupta, James McClay, Sundar Chetlur, Harianto Wong, Gerardo A. Monreal, Nicolás Rafael Biberidis, Octavio H. Alpago, Nicolas Rigoni
  • Publication number: 20210057642
    Abstract: An apparatus including a magnetoresistance element having conductive contacts disposed between the magnetoresistance element and a semiconductor substrate.
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Yen Ting Liu, Maxim Klebanov, Bryan Cadugan, Sundar Chetlur, Harianto Wong
  • Patent number: 10868240
    Abstract: A manufacturing method results in a magnetoresistance element having conductive contacts disposed between the magnetoresistance element and a semiconductor substrate.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: December 15, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Yen Ting Liu, Maxim Klebanov, Bryan Cadugan, Sundar Chetlur, Harianto Wong
  • Publication number: 20200266337
    Abstract: A manufacturing method results in a magnetoresistance element having conductive contacts disposed between the magnetoresistance element and a semiconductor substrate.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Yen Ting Liu, Maxim Klebanov, Bryan Cadugan, Sundar Chetlur, Harianto Wong
  • Publication number: 20200259026
    Abstract: An electronics module assembly for detecting photons is provided to include: a substrate layer; a buried layer deposited upon a first surface area of the substrate layer; an intrinsic layer deposited upon a first portion of a first surface area of the buried layer; a plug layer deposited upon a second portion of the first surface area of the buried layer; a p-plus layer deposited upon a first surface area of the intrinsic layer; an n-plus layer deposited upon a first surface area of the plug layer; a pre-metal dielectric (PMD) layer deposited upon the p-plus layer and n-plus layer; a first node coupled, through the PMD layer, to the p-plus layer; and a second node coupled, through the PMD layer, to the n-plus layer.
    Type: Application
    Filed: February 11, 2019
    Publication date: August 13, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Bryan Cadugan, Harianto Wong, William P. Taylor
  • Publication number: 20200259033
    Abstract: According to an embodiment of the present disclosure, a photodetector device can include a substrate layer; a bottom contacting layer disposed over a surface of the substrate layer and having a first contacting region and a second contacting region, the bottom contacting layer providing a low resistance path between the first and second contacting regions; an insulating layer disposed over a surface of the bottom contacting layer; an intrinsic region disposed within the insulating layer, the intrinsic region in electrical contact with the first contacting region of the bottom contacting layer, the intrinsic region comprising a low band-gap material; a metal contact disposed within the insulating layer and in electrical contact with the second contacting region of the bottom contacting layer; an anode in electrical contact with the intrinsic region; and a cathode in electrical contact with the metal contact.
    Type: Application
    Filed: January 13, 2020
    Publication date: August 13, 2020
    Applicant: Allegro MicroSystems, LLC
    Inventors: Bryan Cadugan, Harianto Wong, William P. Taylor
  • Patent number: 10622549
    Abstract: Methods and apparatus for a signal isolator having a dielectric interposer supporting first and second die each having a magnetic field sensing element. A first signal path extends from the first die to the second die and a second signal path extends from the second die to the first die. In embodiments, the first signal path is located in the interposer and includes a first coil to generate a magnetic field and the second signal path is located in the interposer and includes a second coil to generate a magnetic filed. The first coil is located in relation to the second magnetic field sensing element of the second die and the second coil is located in relation to the first magnetic field sensing element of the first die.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: April 14, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Harianto Wong, Maxim Klebanov, William P. Taylor, Michael C. Doogue
  • Patent number: 10593869
    Abstract: The present disclosure is directed towards a method for patterning a magnetic sensing layer. The method includes disposing a protective layer on a first of a substrate, disposing a first insulating layer on a first surface of protective layer. An opening is formed in the first insulating layer to expose the first surface of the protective layer. A magnetic sensing layer is disposed over the first insulating layer and a predetermined portion of the first surface of the protective layer within the opening. A second insulating layer can be disposed over the magnetic sensing layer. The second insulation layer and the magnetic sensing layer can be removed from the first insulation layer. Thus, the opening includes the magnetic sensing layer and the second insulation layer after the removal of the second insulation layer and magnetic sensing layer from the first insulation layer.
    Type: Grant
    Filed: July 26, 2016
    Date of Patent: March 17, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Harianto Wong, William P. Taylor
  • Publication number: 20190285667
    Abstract: Systems and methods described herein are directed towards integrating a shield layer into a current sensor to shield a magnetic field sensing element and associated circuitry in the current sensor from electrical, voltage, or electrical transient noise. In an embodiment, a shield layer may be disposed along at least one surface of a die supporting a magnetic field sensing element. The shield layer may be disposed in various arrangements to shunt noise caused by a parasitic coupling between the magnetic field sensing element and the current carrying conductor away from the magnetic field sensing element.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 19, 2019
    Applicant: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Bryan Cadugan, Michael C. Doogue, Alexander Latham, William P. Taylor, Harianto Wong, Sundar Chetlur
  • Patent number: 10352969
    Abstract: Systems and methods described herein are directed towards integrating a shield layer into a current sensor to shield a magnetic field sensing element and associated circuitry in the current sensor from electrical, voltage, or electrical transient noise. In an embodiment, a shield layer may be disposed along at least one surface of a die supporting a magnetic field sensing element. The shield layer may be disposed in various arrangements to shunt noise caused by a parasitic coupling between the magnetic field sensing element and the current carrying conductor away from the magnetic field sensing element.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: July 16, 2019
    Assignee: Allegro MicroSystems, LLC
    Inventors: Shaun D. Milano, Bryan Cadugan, Michael C. Doogue, Alexander Latham, William P. Taylor, Harianto Wong, Sundar Chetlur