Patents by Inventor Harold L. Massie

Harold L. Massie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8581416
    Abstract: In one embodiment, a leadframe for a semiconductor package includes a source connection area for one transistor and a drain connection point for a second transistor, and a common connection for using a connection clip to couple a drain of the first transistor to a source of the second transistor and to the common connection.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: November 12, 2013
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Harold L. Massie, Phillip Celaya, David F. Moeller, Mark Randol
  • Publication number: 20130154073
    Abstract: In one embodiment, a leadframe for a semiconductor package includes a source connection area for one transistor and a drain connection point for a second transistor, and a common connection for using a connection clip to couple a drain of the first transistor to a source of the second transistor and to the common connection.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Inventors: Harold L. Massie, Phillip Celaya, David F. Moeller, Mark Randol
  • Patent number: 7852148
    Abstract: In one embodiment, a sensing circuit includes a sense transistor and a compensation circuit to improve the accuracy of a sensing signal formed by the sensing circuit.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: December 14, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Harold L. Massie, Jarvis Leroy Carter, Sr.
  • Publication number: 20100244947
    Abstract: In one embodiment, a sensing circuit includes a sense transistor and a compensation circuit to improve the accuracy of a sensing signal formed by the sensing circuit.
    Type: Application
    Filed: March 27, 2009
    Publication date: September 30, 2010
    Inventors: Harold L. Massie, Jarvis Leroy Carter, SR.
  • Patent number: 7746156
    Abstract: A circuit and method for driving a field effect transistor is disclosed. A switching circuit includes a driver device having a signal input, a supply voltage input, and an output. The driver output is coupled to a JFET. A converter couples to the JFET and provides an output of the switching circuit. When enabled, a switching device couples this switching circuit output to the gate of the JFET, thus causing the JFET to be driven into conduction.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: June 29, 2010
    Assignee: QSpeed Semiconductor Inc.
    Inventors: Harold L. Massie, Kuang Ming Daniel Chang
  • Patent number: 6510065
    Abstract: Briefly, in accordance with one embodiment of the invention, a circuit includes: a DC-to-DC converter. The DC-to-DC converter includes a plurality of ripple regulator DC-to-DC converter circuits. The plurality of circuits are coupled so that the output signals produced by each of the ripple regulator DC-to-DC converter circuits is out of phase with respect to the other of the ripple regulator DC-to-DC converter circuits.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: January 21, 2003
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Edward L. Payton
  • Patent number: 6417653
    Abstract: Briefly, in accordance with one embodiment of the invention, a DC-to-DC converter includes: a circuit configuration to modify the set point of the output voltage signal level of the DC-to-DC converter circuit in response to a transient signal by an amount related, at least in part, to the magnitude of the transient signal. Briefly, in accordance with yet another embodiment of the invention, a DC-to-DC converter circuit includes: a high-side and a low-side voltage switching device. The switching devices are coupled in a circuit configuration to apply a control voltage signal to each switching device based, at least in part, on the state of the other switching device.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: July 9, 2002
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Edward L. Payton, Robert D. Wickersham
  • Publication number: 20020039017
    Abstract: Briefly, in accordance with one embodiment of the invention, a DC-to-DC converter includes: a circuit configuration to modify the set point of the output voltage signal level of the DC-to-DC converter circuit in response to a transient signal by an amount related, at least in part, to the magnitude of the transient signal.
    Type: Application
    Filed: April 30, 1997
    Publication date: April 4, 2002
    Inventors: HAROLD L. MASSIE, EDWARD L. PAYTON, ROBERT D. WICKERSHAM
  • Patent number: 6271650
    Abstract: A power supply including a DC—DC converter with multiphase current sharing and ripple regulation. In one embodiment, the disclosed power supply includes a plurality of power drivers coupled to supply power to the supply output. The power drivers are cyclically enabled to provide multiphase current sharing. Ripple regulation is provided with a hysteretic comparator that is coupled to receive feedback from the power supply output. The hysteretic comparator is used to clock or advance a select circuit, which is used to cyclically enable each one of the plurality of power drivers. A reset circuit is included to reset the hysteretic comparator in the event that the hysteretic comparator has not switched for an excessive amount of time. A supply current sensor is used to monitor the current drawn by the plurality of power drivers.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: August 7, 2001
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Edward L. Payton
  • Patent number: 6144115
    Abstract: A power share distribution system and method. Included are: a plurality of power supplies; an isolator provided for each power supply of the plurality of power supplies for selectively blocking/passing an output power from the power supply; and a controller controlling each isolator for passing an output power of each power supply for a predetermined time, such that different groups (including groups of 1) of the plurality of power supplies supply output power to a load at different times. In a preferred embodiment, the power supplies are more particularly current supplies. Further, in a preferred embodiment, the controller more specifically passes an output current of each current supply such that each current supply supplies current to the load for mutually exclusive times.
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: November 7, 2000
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Peter T. Villanueva
  • Patent number: 6066942
    Abstract: A DC-to-DC converter includes: a first and a second inductor path, the inductor paths being coupled in the converter so as to provide a single voltage output signal during converter operation. An array of switches are coupled so as to control the application of voltage sources to the inductor paths during converter operation. The switches and the array are coupled so that their states are controlled, at least in part, based upon the voltage signal level of the single voltage output signal during converter operation.A method of producing a voltage signal is as follows. One of two voltage sources is applied to an inductor circuit to produce an output voltage signal. The voltage source supplied is switched based, at least in part, on the voltage signal level of the output voltage signal.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: May 23, 2000
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Viktor D. Vogman
  • Patent number: 5889387
    Abstract: A battery charging circuit, particularly useful in a laptop computer system, includes a voltage input terminal coupled to a dc voltage. A first switch couples the voltage input terminal to an output coupled to the battery through a current sense resistor. A first current sink which is on when the charger circuit is on draws current from the input side of the current sense resistor through a first resistor to develop a first voltage. This voltage and a voltage coupled through a second resistor from the battery side of the sense resistor are inputs to a comparator, the output of which controls the first switch. A second current sink, when on, draws current through the second resistor causing the first switch to be held off, turning the charging circuit off. An ON/OFF terminal, to which a variable duty cycle square wave is supplied, controls the turning on and off of the first and second current sinks, with the length of the duty cycle controlling the average current supplied to the battery.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: March 30, 1999
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5845141
    Abstract: A computer system that includes supply programming circuits for remotely programming a power supply such that minimum operating voltages are maintained. The computer system includes a power supply having a supply output line and a supply sense line. The power supply provides a supply voltage via the supply output line in response to a sense voltage received via the sense line. A first circuit that operates at the supply voltage is coupled to the supply output line. A first supply programming circuit is coupled to the first circuit, the supply output line and the sense line. The first supply programming circuit senses the supply voltage at the first circuit and adjusts the sense voltage in response to the sensed supply voltage at the first circuit. A second circuit is also coupled to the supply output line. A second supply programming circuit senses the supply voltage at the second circuit and adjusts the sense voltage in response to the sensed supply voltage at the second circuit.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: December 1, 1998
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5831405
    Abstract: A motor speed control circuit includes a temperature sensor providing a first voltage output which is proportional to the temperature and a control voltage generator having an internal voltage reference receiving the first output as an input. The control voltage generator develops a control voltage representative of a desired motor speed profile which varies substantially linearly between a first predetermined temperature and a second predetermined temperature and supplies the control voltage to a motor drive circuit with a motor drive voltage at its output. The control voltage is fed back to the temperature sensor to achieve a controlled, fast rising slope. A second feedback circuit results in a reduced slope of the voltage between the second predetermined temperature and a third predetermined temperature at which an alarm signal is generated. The circuit also is able to detect a stopped motor and provide an alarm.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: November 3, 1998
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5822166
    Abstract: A transient suppression circuit suppresses transients on a dc power bus, extending between a power supply and a load which carries a first voltage having a nominal value, by charging a capacitor to a second voltage greater than the nominal voltage, detecting a threshold at which the first voltage drops below its nominal value by more than a first predetermined amount and coupling energy from the capacitor to the bus to compensate for the drop in voltage in response to detecting the threshold.
    Type: Grant
    Filed: December 5, 1996
    Date of Patent: October 13, 1998
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5811889
    Abstract: A circuit used in combination with a redundant power supply system to electrically disconnect its failed power supplies. The circuit comprises a power FET, a rectifier and filter circuit, a start-up circuit and a shut-down circuit. The rectifier and filter circuit rectifies an input AC waveform and subsequently filters a resultant DC voltage which is subsequently used to supply an output voltage at an output terminal connected to the power FET. In parallel with the rectifier and filter circuit, the start-up circuit is coupled to a gate of the power FET to ramp the voltage supplied to that gate slowly turning on the power FET. Coupled in parallel with the start-up circuit, the shut-down circuit conducts voltage from the gate thereby turning-off the power FET to preclude current from other power supplies of the redundant power supply system to pass current to its failed power supply.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: September 22, 1998
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5808377
    Abstract: Where a computer system PC board has two separate power planes at different voltage levels and a CPU accesses both power planes, a system for detecting when a CPU will short the two power planes and shutting down the power to the lower voltage plane. The contention prevention circuit consists of a voltage level detection circuit having an input connected to the core power plane. The voltage level detection circuit is connected to the input of a shutdown circuit. Upon receipt of a signal from the voltage level detection circuit indicating that the voltage on the core power plane is greater than that provided by the core power supply, the shutdown circuit disables the core power supply.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: September 15, 1998
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, Russel K. Hampsten
  • Patent number: 5777461
    Abstract: A DC-DC voltage conversion provides a voltage to a processor in a mobile computer system using a high side power FET and a low side power FET, each having a variable gate discharge time dependent on the applied battery voltage. The power FETs are arranged in a synchronous totem pole configuration with a junction point therebetween, coupled between a voltage input terminal and ground, with the junction point coupled to a voltage output terminal. Each of the power FETs is driven by a FET driver, with the driver being coupled to the output of a comparator comparing a reference voltage with the output voltage. To avoid cross-conduction, the high side power FET and the low side power FET are coupled to each other in such a manner that the event of one turning off will turn on the other after a dead time determined by the threshold sense circuit, plus delays of the devices used in the embodiment.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: July 7, 1998
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, G. Mark Johnston
  • Patent number: 5764047
    Abstract: An apparatus for measuring the dc current in a power supply circuit includes a transformer having a primary winding, a core and a secondary winding, a current generator, a pulse generator, and a measurement circuit. The secondary winding of the transformer is coupled to the power supply circuit, wherein the power supply circuit supplies dc current to the secondary winding generating a second field of magnetic flux. The current generator, coupled to the primary winding of the transformer, supplies an ac current to the primary winding generating a first field of magnetic flux. The pulse generator, coupled to the primary winding, generates a pulse when the first field of magnetic flux is substantially equal to the second field of magnetic flux. The measuring circuit, coupled to the current generator and responsive to the pulse generator, measures the ac current from the current generator in response to a pulse received from the pulse generator, wherein the ac current is proportional to the dc current.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: June 9, 1998
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5678049
    Abstract: A computer system that includes supply programming circuits for remotely programming a power supply such that minimum operating voltages are maintained. The computer system includes a power supply having a supply output line and a supply sense line. The power supply provides a supply voltage via the supply output line in response to a sense voltage received via the sense line. A first circuit that operates at the supply voltage is coupled to the supply output line. A first supply programming circuit is coupled to the first circuit, the supply output line and the sense line. The first supply programming circuit senses rises the supply voltage at the first circuit and adjusts the sense voltage in response to the sensed supply voltage at the first circuit. A second circuit is also coupled to the supply output line. A second supply programming circuit senses the supply voltage at the second circuit and adjusts the sense voltage in response to the sensed supply voltage at the second circuit.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: October 14, 1997
    Assignee: Intel Corporation
    Inventor: Harold L. Massie