Patents by Inventor Harold L. Massie

Harold L. Massie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5650715
    Abstract: A circuit for detecting peak current pulses on a secondary transformer of a power supply and converting these peak current pulses into a direct current (DC) voltages, which can be used for various purposes such as current limiting or current sharing. A peak detection circuit is coupled to the secondary transformer and is employed to detect a peak current pulse through the secondary transformer. A sample and hold circuit that is coupled to the peak detection circuit samples the current through a current sense transformer. The sample and hold circuit provides the current pulse through the secondary transformer in a direct current voltage representation. The sample and hold circuit includes a storage circuit for storing this direct current voltage representation of the current through the secondary transformer. The sample and hold circuit selectively samples the current through the current transformer in response to a control signal generated by the peak detection circuit.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: July 22, 1997
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5623198
    Abstract: A switching regulator circuit comprises a drive circuit, a switching transistor, an output stage and a pre-drive circuit that are coupled in series. The pre-drive circuit is coupled to the drive circuit to apply a pre-drive signal which varies the duty cycle and frequency of a series of drive pulses which activate and deactivate the switching transistor thereby adjusting a voltage of the switching regulator circuit. The pre-drive circuit utilizes a comparator in combination with a hysteresis network to vary the oscillation frequency of the pre-drive signal.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: April 22, 1997
    Assignee: Intel Corporation
    Inventors: Harold L. Massie, G. Mark Johnston
  • Patent number: 5587650
    Abstract: A switching regulator circuit. The switching regulator circuit comprises a primary feedback loop and a secondary feedback connection. The primary feedback loop comprises a drive circuit, a switching transistor, an output stage, a voltage divider circuit, and a pre-drive circuit that are coupled in series. The pre-drive circuit is coupled to the drive circuit to close the primary feedback loop. The primary feedback loop uses negative feedback to output a predetermined output voltage. The secondary feedback connection is coupled between an input and an output of the pre-drive circuit. The secondary feedback connection uses regenerative feedback to provide hysteresis such that the primary feedback loop oscillates. The switching regulator circuit thus regulates the output voltage without requiring a separate oscillator circuit.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: December 24, 1996
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5534771
    Abstract: A high precision DC-DC converter circuit having improved efficiency is disclosed. The DC-DC converter circuit includes a low accuracy switching regulator circuit for driving a switching field effect transistor (FET) on and off. A high accuracy output voltage regulator circuit is inserted into the feedback loop between the output of the DC-DC converter circuit and the sensing input of the switching regulator circuit such that the accuracy of the output voltage regulator circuit primarily determines the precision of the DC-DC converter. The DC-DC converter also includes a quick shut-off circuit coupled to the gate and source of the FET for driving the gate of the FET negative when the FET is switched off such that switching losses are minimized. A second embodiment of the high precision DC-DC converter is used to convert from 5.0 to 3.3 volts. The second embodiment includes a transformer, one winding of which is used as an output inductor.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: July 9, 1996
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5455501
    Abstract: A primary voltage generation circuitry and an auxiliary voltage generation circuitry is provided to a DC-DC converter. The primary voltage generation circuitry generates a primary voltage output, and the auxiliary voltage generation circuitry, in cooperation with the primary voltage generation circuitry, generates an auxiliary voltage output. The primary voltage generation circuitry includes a switching circuit element and an inductor element, whereas the auxiliary voltage generation circuitry includes an inductor element complementary to the inductor element of the primary voltage generation circuitry. The inductor element of the auxiliary voltage generation circuitry references the primary voltage output, and relies on a minimum load at the primary voltage output. Preferably, the auxiliary voltage generation circuitry further includes reference circuitry elements for regulating the auxiliary voltage output to a precise assurance range.
    Type: Grant
    Filed: March 24, 1994
    Date of Patent: October 3, 1995
    Assignee: Intel Corporation
    Inventor: Harold L. Massie
  • Patent number: 5428524
    Abstract: An apparatus and method for current sharing among multiple power supplies is disclosed. The output current of each power supply is compared in an amplifier which produces an output signal. This signal controls a transistor used to enable or disable current flow on a SENSE line in a particular power supply. By controlling the SENSE line, the output current of each power supply is adjusted to roughly equal levels. The combined current is thereby the combination of approximately equal shared outputs of each individual power supply. The current share of each individual power supply is offset by a predetermined level to prevent a race condition in the initial power-up phase.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: June 27, 1995
    Assignee: Intel Corporation
    Inventor: Harold L. Massie