Patents by Inventor Harold Robert Feldman Zatz

Harold Robert Feldman Zatz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6809732
    Abstract: A graphics subsystem having a programmable shader controllable by both state-based control information, such as DirectX 8 control information, and program instructions, such as DirectX 9 shader program instructions. The programmable shader translates state-based control information received from a host computer into native control information. The programmable shader translates into native control information program instructions fetched from memory locations identified by a received memory reference and program instructions received from the graphics subsystem. Native control information configures computation units of the programmable shader. The programmable shader optimizes the generated native control information by combining certain operations. The graphics subsystem detects memory references sent from the host computer and pre-fetches program instructions for transmission to the programmable shader.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: October 26, 2004
    Assignee: NVIDIA Corporation
    Inventors: Harold Robert Feldman Zatz, David C. Tannenbaum
  • Patent number: 6806886
    Abstract: A system, method and article of manufacture are provided for converting color data into floating point values in a graphics pipeline. First, color data is received. Next, the color data is separated into a plurality of components each including an integer. The components of color data are then converted into floating point values by dividing at least a portion of the components by predetermined numbers.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: October 19, 2004
    Assignee: nVidia Corporation
    Inventor: Harold Robert Feldman Zatz
  • Publication number: 20040169650
    Abstract: Digital Image compositing using a programmable graphics processor is described. The programmable graphics processor supports high-precision data formats and can be programmed to complete a plurality of compositing operations in a single pass through a fragment processing pipeline within the programmable graphics processor. Source images for one or more compositing operations are stored in graphics memory, and a resulting composited image is output or stored in graphics memory. More-complex compositing operations, such as blur, warping, morphing, and the like, can be completed in multiple passes through the fragment processing pipeline. A composited image produced during a pass through the fragment processing pipeline is stored in graphics memory and is available as a source image for a subsequent pass.
    Type: Application
    Filed: May 21, 2003
    Publication date: September 2, 2004
    Inventors: Rui M. Bastos, Daniel Elliott Wexler, Larry Gritz, Jonathan Rice, Harold Robert Feldman Zatz, Matthew N. Papakipos, David Kirk
  • Patent number: 6731298
    Abstract: A system, method and article of manufacture are provided for computer graphics processing. First, pixel data is received including a depth-value. Thereafter, the depth-value is modified based on a depth-component of an algorithm. An operation is subsequently performed on the pixel data taking into account the modified depth-value.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: May 4, 2004
    Assignee: NVIDIA Corporation
    Inventors: Henry P. Moreton, John Erik Lindholm, Matthew N. Papakipos, Harold Robert Feldman Zatz
  • Patent number: 6724394
    Abstract: A system and associated method are provided for processing pixel data in a graphics pipeline. Included is a triangle module coupled to a rasterizer for calculating a plurality of equations using pixel data received from the rasterizer. Also provided is a shader core module coupled to the rasterizer for receiving the pixel data therefrom. The shader core module is further coupled to the triangle module for receiving the equations therefrom. The shader core module functions to execute floating point calculations and generating texture coordinates using the pixel data. Coupled to the shader core module is a texture module. The texture module is capable of looking up texture values using the texture coordinates. Associated therewith is a shader back end module coupled to the texture module and the triangle module. The shader back end module is capable of converting the texture values to an appropriate floating point representation and generating color values using the equations.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: April 20, 2004
    Assignee: NVIDIA Corporation
    Inventors: Harold Robert Feldman Zatz, Henry P. Moreton, John Erik Lindholm
  • Publication number: 20040012596
    Abstract: A method and apparatus for executing loop and branch program instructions in a programmable graphics shader. The programmable graphics shader converts a sequence of instructions comprising a portion of a shader program and selects a first set of fragments to be processed. Subsequent sequences of instructions are converted until all of the instructions comprising the shader program have been executed on the first set of fragments. Each remaining set of fragments is processed by the shader program until all of the fragments are processed in the same manner. Furthermore, the instructions can contain one or more loop or branch program instructions that are conditionally executed. Additionally, when instructions within a loop as defined by a loop instruction are being executed a current loop count is pipelined through the programmable graphics shader and used as an index to access graphics memory.
    Type: Application
    Filed: November 22, 2002
    Publication date: January 22, 2004
    Inventors: Roger L. Allen, Harold Robert Feldman Zatz
  • Publication number: 20040012597
    Abstract: A graphics subsystem having a programmable shader controllable by both state-based control information, such as DirectX 8 control information, and program instructions, such as DirectX 9 shader program instructions. The programmable shader translates state-based control information received from a host computer into native control information. The programmable shader translates into native control information program instructions fetched from memory locations identified by a received memory reference and program instructions received from the graphics subsystem. Native control information configures computation units of the programmable shader. The programmable shader optimizes the generated native control information by combining certain operations. The graphics subsystem detects memory references sent from the host computer and pre-fetches program instructions for transmission to the programmable shader.
    Type: Application
    Filed: December 13, 2002
    Publication date: January 22, 2004
    Inventors: Harold Robert Feldman Zatz, David C. Tannenbaum
  • Publication number: 20040012598
    Abstract: A method and apparatus for generating depth values in a programmable graphics system. Depth values are calculated under control of a pixel program using a variety of sources as inputs to programmable computation units (PCUs) in the programmable graphics systems. The PCUs are used to compute traditional interpolated depth values and modified depth values. Th PCUs are also used to compute arbitrary depth values which, unlike traditional interpolated depth values and modified depth values, are not dependent on the coordinates of the geometry primitive with which the arbitrary depth values are associated. Several sources are available as inputs to the PCUs. Clipping with optional clamping is performed using either interpolated depth values or calculated depth values, where calculated depth values are arbitrary depth values or modified depth values. Final depth values, used for depth testing, are selected from interpolated depth values and arbitrary depth values after clipping is performed.
    Type: Application
    Filed: November 22, 2002
    Publication date: January 22, 2004
    Inventor: Harold Robert Feldman Zatz
  • Patent number: 6664963
    Abstract: A system, method and computer program product are provided for performing shader calculations in a graphics pipeline. Initially, a shading calculation is performed in order to generate output. Thereafter, an additional shading calculation is carried out. Such additional shading calculation includes converting the output of the shading calculation into a floating point format. Further, a dot product is calculated utilizing the converted output and texture coordinates. The dot product is then clamped. Next, the clamped dot product is stored in a plurality of color components.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: December 16, 2003
    Assignee: NVIDIA Corporation
    Inventor: Harold Robert Feldman Zatz
  • Patent number: 6532013
    Abstract: A system, method and article of manufacture are provided for interweaving shading calculations and texture retrieval operations during texture sampling in a graphics pipeline. First, a shading calculation is performed in order to generate output. Next, texture information is retrieved, and another shading calculation is performed using the texture information in order to generate additional output. Texture information may be retrieved and shading calculations may then be repeated as desired. Thereafter, the generated output may be combined. As such, the repeated texture information retrieval and shading calculations may be carried out in an iterative, programmable manner.
    Type: Grant
    Filed: May 31, 2000
    Date of Patent: March 11, 2003
    Assignee: NVIDIA Corporation
    Inventors: Matthew N. Papakipos, David B. Kirk, Liang Peng, Harold Robert Feldman Zatz