Abstract: The present invention relates to humanized immunoglobulins, mouse monoclonal antibodies and chimeric antibodies that have binding specificity for human CD52. The present invention further relates to a humanized immunoglobulin light chain and a humanized immunoglobulin heavy chain. The invention also relates to isolated nucleic acids, recombinant vectors and host cells that comprise a sequence which encodes a humanized immunoglobulin or immunoglobulin light chain or heavy chain, and to a method of preparing a humanized immunoglobulin. The humanized immunoglobulins can be used in therapeutic applications to treat, for example, autoimmune disease, cancer, non-Hodgkin's lymphoma, multiple sclerosis and chronic lymphocytic leukemia.

Abstract: A wireless system includes memory configured to store information of physical layer rates associated with power levels between a client device and respective access points. The power levels comprise information of amounts of power in signals received by the client device from the respective access points. The system includes one or more processors configured to: during a communication session between the client device and a first access point, determine a current power level between the client device and a second access point, access the information based on the current power level to determine an expected physical layer rate between the client device and the second access point, determine a current physical layer rate between the client device and the first access point, and determine whether to switch the communication session to the second access point based on the expected physical layer rate and the current physical layer rate.

Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. The area comprises a plurality of pixels, and the original set of exposure information comprises dosages for the plurality of pixels in the area. A backscatter is calculated for a sub area of the area based on the original set of exposure information including the dosages for the plurality of pixels in the area. An increase in dosage for at least one pixel in a plurality of pixels in the sub area is determined, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area.

Abstract: Dynamic Random Access Memory (DRAM) and a logic layer having direct access to the DRAM which provides symbolic addressing services. These services are provided by sequencers in the logic layer. The sequencers maintain a DRAM row or row-pair in sorted order, find a location and insert a new data element into the row or row-pair, all while preserving the sorted order. The sequencer is a plurality sequencer groups, each a plurality of sequencer cells. The sequencer cells perform a highly parallel pipeline insertion of a new data element. The logic layer also defines a Self-Addressing Memory Central Processing Unit (SamPU) operatively coupled to, and configured to control, the sequencer. The logic layer provides program memory for SamPU and a memory cache to build an index database. The database is subject to mitosis to accommodate the overflow of any item in the index database.

Abstract: Methods and systems for exposing a desired shape in an area on a surface using a charged particle beam system include determining a local pattern density for the area, based on an original set of exposure information. A pre-proximity effect correction (PEC) maximum dose for the local pattern density is determined, based on a pre-determined target post-PEC maximum dose. The pre-PEC maximum dose may be calculated near an edge of the desired shape. Methods also include modifying the original set of exposure information with the pre-PEC maximum dose to create a modified set of exposure information.

Abstract: Embodiments include an automatic set top box placement (STB) process and system that balances video playback needs against the performance characteristics of individual devices and the communications system. For video playback, this involves maintaining required sustained data rates needed to support video of various levels of quality and resolution and matching these against the capacity of the Wi-Fi system in terms of channel capacity and gateway/Access Point to STB connection quality. An intelligent network controller calculates the STB total airtime. Each STB is associated with a Service Set Identifier (SSID) that the controller uses to identify the STB clients. The controller calculates the End-to-End PHY rates for each client. The total STB airtime can then be calculated and compared to the default allocation for the STBs. Recommendations regarding moving STBs, gateways, and or satellite/booster devices can then be provided to the user.

Abstract: Methods for exposing a desired shape in an area on a surface using a charged particle beam system include determining a local pattern density for the area of the desired shape based on an original set of exposure information. A backscatter for a sub area is calculated, based on the original set of exposure information. Dosage for at least one pixel in a plurality of pixels in the sub area is increased, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area. A pre-PEC maximum dose is determined for the local pattern density, based on a pre-determined target post-PEC maximum dose. The original set of exposure information is modified with the pre-PEC maximum dose and the increased dosage of the at least one pixel in the sub area to create a modified set of exposure information.

Abstract: A system for interference detection includes one or more processors are configured to receive from one or more access points within a wireless network information indicative of airtime usage of one or more client devices associated with the one or more access points, determine an amount of total interference for at least one of the access points on a first channel, the total interference including foreign interference and in-network interference, determine a correlation between the total interference and the airtime usage of the one or more client devices, determine an amount of the foreign interference or an amount of the in-network interference based on the correlation, and selectively switch the at least one of the access points from communicating on the first channel to communicating on a second channel based on the determined amount of the foreign interference or the determined amount of the in-network interference.

Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. The area comprises a plurality of pixels, and the original set of exposure information comprises dosages for the plurality of pixels in the area. A backscatter is calculated for a sub area of the area based on the original set of exposure information including the dosages for the plurality of pixels in the area. An increase in dosage for at least one pixel in a plurality of pixels in the sub area is determined, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area.

Abstract: Methods for exposing a desired shape in an area on a surface using a charged particle beam system include determining a local pattern density for the area, based on an original set of exposure information. A pre-proximity effect correction (PEC) maximum dose for the local pattern density is determined, based on a pre-determined target post-PEC maximum dose. The pre-PEC maximum dose is calculated near an edge of the desired shape. Methods also include modifying the original set of exposure information with the pre-PEC maximum dose to create a modified set of exposure information.

Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. The area comprises a plurality of pixels, and the original set of exposure information comprises dosages for the plurality of pixels in the area. A backscatter is calculated for a sub area of the area based on the original set of exposure information. A dosage for at least one pixel in a plurality of pixels in the sub area is increased, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area. A modified set of exposure information is output, including the increased dosage of the at least one pixel in the sub area.

Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. A backscatter is calculated for the area of the pattern based on the exposure information. An artificial background dose is determined for the area. The artificial background dose comprises additional exposure information and is combined with the original set of exposure information creating a modified set of exposure information. A system for exposing a pattern in an area on a surface using a charged particle beam lithography is also disclosed.

Abstract: Systems, apparatuses, and methods related to memory systems and operation are described. A memory system may be coupled to a processor, which includes a memory controller. The memory controller may determine whether targeting of first data and second data by the processor to perform an operation results in processor-side cache misses. When targeting of the first data and the second data result in processor-side cache misses, the memory controller may determine a single memory access request that requests return of both the first data and the second data and instruct the processor to output the single memory access request to a memory system via one or more data buses coupled between the processor and the memory system to enable processing circuitry implemented in the processor to perform the operation based at least in part on the first data and the second data when returned from the memory system.

Abstract: Systems, apparatuses, and methods related to memory systems and operation are described. A memory system may be communicative coupled to a processor via one or more data buses. Additionally, the memory system may include one or more memory devices that store data to be used by processing circuitry implemented in the processor to perform an operation. Furthermore, the memory system may include a memory controller that receives a memory access request that return of the data via the one or more data buses and, in response, determines a storage location of the data in the one or more memory devices based at least in part on the memory access request and instructs the memory system to store the data directly into a processor-side cache integrated with the processing circuitry to enable the processing circuitry implemented in the processor to perform the operation based on the data.

Abstract: Systems, apparatuses, and methods related to memory systems and operation are described. A memory system may be communicative coupled to a processor via one or more data buses. Additionally, the memory system may include one or more memory devices that store data to be used by processing circuitry implemented in the processor to perform an operation. Furthermore, the memory system may include a memory controller that receives a memory access request that requests return of the data via the one or more data buses and, in response, determines a storage location of the data in the one or more memory devices based at least in part on the memory access request and instructs the memory system to store the data directly into a processor-side cache integrated with the processing circuitry to enable the processing circuitry implemented in the processor to perform the operation based on the data.

Abstract: Systems, apparatuses, and methods related to memory systems and operation are described. A memory system may be coupled to a processor, which includes a memory controller. The memory controller may determine whether targeting of first data and second data by the processor to perform an operation results in processor-side cache misses. When targeting of the first data and the second data result in processor-side cache misses, the memory controller may determine a single memory access request that requests return of both the first data and the second data and instruct the processor to output the single memory access request to a memory system via one or more data buses coupled between the processor and the memory system to enable processing circuitry implemented in the processor to perform the operation based at least in part on the first data and the second data when returned from the memory system.

Abstract: Techniques are described for configuring an optical network unit (ONU) in a pre-burst state prior to transitioning the ONU to a burst-on state. During the pre-burst state, a laser emitter of the ONU stabilizes to its wavelength, thereby reducing the impact of wavelength drift when the ONU transitions to the burst-on state.

Abstract: The present disclosure includes systems, apparatuses and methods related to maintaining data in a sorted order in a memory array to improve access time to data in the memory array and directing access to a row of data in cache based upon an address associated with the data. In a number of embodiments, a number of keys that are stored in a first row of an index table can be split between the first row and a second row in response to the first row being full, where the number of keys are copied to the second row and a first portion of the number of keys remain in the first row and a second portion of the number of keys are moved to the second row.

Abstract: The present disclosure includes systems, apparatuses and methods related to maintaining data in a sorted order in a memory array to improve access time to data in the memory array and directing access to a row of data in cache based upon an address associated with the data. In a number of embodiments, data can be sorted by receiving a portion of data for storage in a memory device, extracting a key associated with the portion of data, determining a row of an index table to store the key, and placing the key along with a number of keys in the row of the index table in a sorted order, wherein the sorted order is in relation to keys associated with portions of data previously stored in the memory device.

Abstract: Methods, apparatuses, and systems related to mapping a virtual address using a physical address are described. In a memory system including a memory (e.g., cache) and a content addressable memory (CAM), the CAM can be configured to search data requested by a host from the memory based on multiple indicators stored in the CAM. For example, in the event that the data stored in the memory is not searchable based on a particular indicator such as a virtual address of a memory array (e.g., main memory), the CAM be configured to search the data based on another indicator such as a physical address of the memory array. Searching the data based on multiple indicators can resolve a synonym problem.