Abstract: A substrate of an integrated circuit has a first surface and an opposing second surface. A functionalized region is formed at least on the first surface. At least one electrical through-plating is provided as a through-hole which is continuously filled with an electrically conductive material and which runs from the first surface to the second surface through the substrate. To ensure that the through-plating can be reliably produced and is provided in a space-saving manner, the through-hole has at least one gradation on which a transition occurs from a smaller hole cross-section on the side of the first surface to a larger hole cross-section on the side of the second surface.

Abstract: The present invention provides an apparatus having stacked semiconductor components. Two semiconductor components (21, 26) are arranged such that their contact regions (28, 22) are opposite one another. A contact-connection device (29) forms a short electrical connection between the two contact regions (28, 22). The contact regions (28, 22) are connected to external contact regions (36) of the apparatus via a rewiring (23).

Abstract: A photonic crystal, which is a periodically arranged structure made of free-standing columns, has a base material of at least one metal or a metal alloy. Intermediate spaces between the columns allow passage of a gas to be analyzed. The photonic crystal has predefined imperfections, by which at least one resonator is formed, the resonant frequency of which is in a frequency range which is absorbed by a gas component to be detected. A heating unit heats at least some of the columns and at least one detector element extracts the energy present in the resonator in the heated state under the action of the gas to be analyzed. The device may have extremely small dimensions and very low energy consumption.

Abstract: At least two separate single-crystal silicon layers are formed in a micromechanical substrate which has a diaphragm in a partial region. The diaphragm has a thickness of less than 20 ?m and includes part of a first of the single-crystal silicon layers. The substrate construction also includes a heating element configured to generate a temperature of more than 650° C. in at least part of the diaphragm. The substrate includes at least one diffusion barrier layer that reduces the oxidation of the first single-crystal silicon layer.

Abstract: A silicon photomultiplier has a silicon chip with an array of microcells. The microcells form photon-sensitive active areas, each surrounded by photon-insensitive inactive areas. At least one elevated, three-dimensional light concentrating structure is located directly on top of the silicon chip within an inactive area and configured such that photons that would have hit an inactive area are redirected towards an active area. The light concentrating structure does lead to increased detection efficiency. The SiPM is usable in areas like medical imaging (e.g. PET, SPECT, CT and other X-ray detectors) as well as astrophysics, high-energy physics and other analytics applications.

Abstract: A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.

Abstract: An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active front face and/or on the passive rear face, and with conductive connections being provided in the form of structured conductive tracks for providing an electrical connection from the active front face to the passive rear face. An electronic assembly formed of stacked semiconductor chips, and a method for producing the electronic component and the electronic assembly are also provided.

Abstract: An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body.

Abstract: A three-dimensional micro-structure has a plurality of adjacent micro-columns which are arranged at a distance from each other and essentially parallel in relation to the respective longitudinal extension. The micro-columns are made of at least one micro-column material having respectively an aspect ratio in the region of 20-1000 and respectively a micro-column diameter in the region of 0.1 ?m-200 ?m. A micro-column intermediate chamber is arranged between adjacent micro-columns having a micro-column distance selected from between the adjacent micro-columns in the region of 1 ?m-100 ?m. According to a method for producing the three-dimensional micro-structures: a) a template is provided with template material, b) the micro-column material is arranged in the column-like cavities, and c) the template is at least partially removed.

Abstract: A thermo-electric energy converter converts thermal energy into electric energy and vice-versa. A three-dimensional micro-structure has micro-columns with different micro-column materials. The micro-column materials have different Seebeck-coefficients (thermopower). The diameters of said micro-columns which are arranged parallel to each other are from 0.1 ?m-200 ?m. The micro-columns have, respectively, an aspect ratio between 20-1000. Also, the micro-columns are coupled together as thermo-pairs for building a thermo-voltage. In order to produce the micro-structure, a template has a three-dimensional template structure with column-like template cavities, essentially inverse to the micro-structure micro-column material is inserted in the cavities thus producing micro-columns, and the template material is at least partially removed.

Abstract: An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body.

Abstract: A method of fabricating an electrical contact through a through hole in a substrate, wherein the through hole is at least in part filled with a liquid conductive material and the solidified liquid conductive material provides an electrical contact through the through hole.

Abstract: A feature is inscribed in a major surface of a microelectronic workpiece having a material property expressed as a reference coefficient value. The feature includes a first material having a first coefficient value for the material property and a second material having a second coefficient value for the material property. The first coefficient value is different from the reference coefficient value different from the first coefficient value and the second coefficient value is different from the first coefficient value. The first and second materials behave as an aggregate having an aggregate coefficient value for the material property between the first coefficient value and the reference coefficient value.

Abstract: An integrated circuit, a circuit system and method of manufacturing such is disclosed. One embodiment provides a circuit chip including a first contact field on a chip surface; and an insulating layer on the chip surface. The insulating layer includes a flexible material. A contact pillar is coupled to the first contact field and extends from the chip surface through the insulating layer. The contact pillar includes a conductive material.

Abstract: A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.

Abstract: A method for placing material onto a target board by means of a transfer board comprising a plurality of blind holes, the method comprising the steps of immersing the transfer board in a material bath, wherein a first pressure acts on the material bath and a second pressure acts in the blind holes, and wherein the first pressure and the second pressure are substantially equal; generating a pressure difference between the first pressure and the second pressure, so that the blind holes of the transfer board are filled at least partially with the liquid material; extracting the transfer board from the material bath; and positioning the transfer board opposite to the target board, the material being expelled from the blind holes, such that the material touches the target board.

Abstract: A semiconductor device is provided configured to be electrically connected to another device by through silicon interconnect technology. The semiconductor device includes a semiconductor substrate with at least one through hole. A through silicon conductor extends inside the through hole from the upper side to the bottom side of the semiconductor substrate. The through silicon conductor is electrical isolated from the semiconductor substrate and includes a conductor bump at one of its ends. Between the inner surface of the through hole and the through silicon conductor a gap is formed. The gap surrounds the through silicon conductor on one side of the semiconductor substrate having the conductor bump, and extends from this side of the substrate into the substrate. The gap is filled with a flexible dielectric material.

Abstract: Embodiments of the invention relate to a semiconductor module and to a method for manufacturing a semiconductor module. In an embodiment of the invention, a semiconductor module for mounting to a board may include at least an integrated circuit having connections on at least one side of the integrated circuit, and at least a first layer which is applied to the side of the integrated circuit having the connections, wherein the free surface of the first layer facing away from the integrated circuit has a thermo-mechanical linear expansion in the in-plane direction of the surface which corresponds to the thermo-mechanical linear expansion of the board to which the semiconductor module is to be mounted.

Abstract: Fabricating an integrated circuit device includes providing a semiconductor substrate comprising a first surface and a second surface, forming a wiring layer on the first surface of the semiconductor substrate, providing a circuit chip, and arranging the circuit chip on the wiring layer of the semiconductor substrate. The fabricating further includes forming an embedding layer on the wiring layer and on the circuit chip, the embedding layer encapsulating the circuit chip, thinning the semiconductor substrate at the second surface after forming the embedding layer, and forming a conductive via in the semiconductor substrate being electrically coupled to the wiring layer and exposed at the second surface of the semiconductor substrate. Moreover, an integrated circuit device is described.

Abstract: A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.