Abstract: An alignment mark protection structure (95) is disclosed which is used to ensure an integrity of an alignment scheme for a substrate (50) which is to be subjected to lithographic processing. The alignment mark protection structure (95) comprises the substrate (50) and an alignment mark (52) associated with the substrate (50). The alignment mark (52) reflects an alignment light (208) which is then used to determine an optimum alignment between the substrate (50) and a lithographic mask (214). A cap (100) overlies the alignment mark (52) and is substantially transparent with respect to the alignment light (208). The cap (100) protects the underlying alignment mark (52) from lithographic process-induced damage during processing and thus reduces alignment light noise, thereby improving the alignment between a mask (214) and the substrate (50) and minimizing the registration error associated with overlying layers formed on the substrate (50).

Abstract: A reflective lithography mask (12) including a substrate (40); a reflective coating (42); a plurality of absorbing blocks (44) covering certain regions of the reflective coating (42) in a manner corresponding to a desired circuit pattern; and a plurality of buffer blocks (46) situated between the covered regions of the reflective coating and the absorbing blocks. The buffer blocks (46) are made of an electrically conducting material, such as carbon in graphite form; tin oxide (and materials based on this compound) and/or indium oxide (and materials based on this compound). Since the buffer material is electrically conducting, rather than insulating, the risk of electrostatic discharge damage is reduced.

Abstract: A reflective lithography mask (12) includes a pattern-producing portion (200) and a substrate (300) supporting the pattern-producing portion on its top surface. The pattern-producing portion has reflective regions and non-reflective regions corresponding to a desired circuit pattern. The substrate (300) comprises a top layer (306) having a top surface with an optical flatness in the range of at least a quarter-wavelength and a bottom layer (304) having a coefficient of thermal expansion less than about 1.0 ppm/.degree. C. The reflective mask (12) is used in a lithography method to delineate a latent image of a desired circuit pattern (preferably having design rules of 0.18 .mu.m and less) onto a wafer (14) by illuminating the mask (12) with radiation (preferably having a wavelength of 3 nm to 50 nm) so as to reflect radiation from the reflective regions of the mask onto the wafer (14).

Abstract: A method of characterizing linewidth errors in a lithography system 30 used to delineate a desired pattern onto an exposure site of a wafer 32. The pattern of a reticle 34 is transferred onto an exposure site 56 of a wafer 32 by projecting a slit of light extending in a slit direction y through the reticle while scanning the reticle and the wafer in a scanning direction x relative to the lens. The exposure site 56 is conceptually divided into a grid having one series of lines extending in the scan direction x and another series of lines extending in the slit direction y whereby points corresponding to perpendicular intersections of the lines may each be assigned a pair of coordinates (x,y). The linewidths of the pattern are measured for each of the points (x,y) and a linewidth error value ERROR (x,y) is generated for each of the points (x,y). An ERROR.sub.optical (y) value for each y coordinate is calculated by averaging the ERROR (x,y) values for each group of points (x,y) having a common y coordinate.

Abstract: Methods and intermediates are disclosed for the preparation of trifluoromethylthioacetic acid using the reaction of trifluoromethylsulfenyl halides with certain orthoesters.