Patents by Inventor Harry M. Yudenfriend

Harry M. Yudenfriend has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10031810
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: July 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Publication number: 20180203803
    Abstract: Aspects include a computer-implemented method for managing alias devices across logical control units. Aspects include establishing one or more alias management groups associated with a set of one or more logical control units. Aspects also include responsive to one or more changes to the set of network paths of a first logical control unit in the set of logical control units performing a method comprising: marking a first alias management group associated with the first logical control unit as invalid for alias borrowing. Then, performing a first synchronized CPU enablement operation that ensures each of the plurality of CPUs has enabled. Aspects include determining whether a second alias management group exists having a second set of control units that matches the set of paths of the first control unit and associating the first control unit with the second alias management group.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 19, 2018
    Inventors: Scott B. Compton, Tri M. Hoang, Stephen M. Kocik, Dale F. Riedy, Harry M. Yudenfriend
  • Patent number: 10013367
    Abstract: An I/O processing system includes an operating system configured to control an input/output (I/O) device, which executes an I/O operation in the I/O processing system. The I/O processing system further includes a channel subsystem module configured to output an interrogation command signal while the I/O device executes an I/O request. The I/O device returns an I/O status signal indicating a status of an ongoing I/O request, and the operating system is configured to dynamically determine a timeout event of the I/O request based on the status of the ongoing I/O request.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dale F. Riedy, Harry M. Yudenfriend
  • Patent number: 10013256
    Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Peter D. Driever, Steven G. Glassen, Kenneth J. Oakes, Peter G. Sutton, Peter K. Szwed, Harry M. Yudenfriend
  • Patent number: 9983813
    Abstract: A primary storage controller receives a write command from a host, wherein Fiber Channel frames corresponding to the write command have a priority indicated by the host. The primary storage controller performs a synchronous copy operation to copy data written by the write command from the primary storage controller to a secondary storage controller, wherein Fiber Channel frames corresponding to the synchronous copy operations have an identical priority to the priority indicated by the host.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Roger G. Hathorn, Bret W. Holley, Harry M. Yudenfriend
  • Patent number: 9984097
    Abstract: According to one embodiment, a host system includes logic adapted for receiving device information from a source system, logic adapted for building a virtual device based at least in part on the received device information, logic adapted for transferring a reserve of a storage device to the host system and/or receiving results of transferring the reserve to the host system, logic adapted for determining if the reserve is held by the host system, logic adapted for recording the reserve if the reserve is held by the host system, and logic adapted for sending a notification that the reserve is not held by the host system if the reserve is not held by the host system. Other systems and computer program products are also described according to various embodiments.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Mark P. Gardiner, Clint A. Hardy, Matthew J. Kalos, William R. White, Stephen G. Wilkins, Harry M. Yudenfriend
  • Publication number: 20180145918
    Abstract: A first device determines whether an indicator is configured to allow use of an increased value for an information unit pacing credit that is greater than a default value for the information unit pacing credit, where the information unit pacing credit indicates a number of information units that a second device is allowed to send to the first device without waiting for any additional response from the first device. In response to determining that the indicator is configured to allow use of the increased value for the information unit pacing credit that is greater than the default value for the information unit pacing credit, the first device adjusts the information unit pacing credit via a response sent from the first device to the second device, to the increased value that is greater than the default value.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 24, 2018
    Inventors: Roger G. Hathorn, Bret W. Holley, Harry M. Yudenfriend
  • Patent number: 9965350
    Abstract: A method of maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system includes issuing, with a processor executing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction including a plurality of device table entries. The method also includes determining, with a host bridge processor, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction, and pinning, with the host bridge processor, a device table entry from a device table based on the determination.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 8, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Craddock, Matthias Klein, Eric N. Lais, Harry M. Yudenfriend
  • Publication number: 20180107680
    Abstract: A computer-implemented method for transferring a reserve to a target host, according to one embodiment, includes granting to a source system, by a control unit, a reserve for a volume of a storage device. A push reserve command is received from the source system. The push reserve command specifies: a transfer of the reserve to a target system, parameter data identifying the target system, and path information specifying the source system. The reserve is transferred only to the target system in response to release of the reserve by the source system.
    Type: Application
    Filed: December 14, 2017
    Publication date: April 19, 2018
    Inventors: Susan K. Candelaria, Mark P. Gardiner, Clint A. Hardy, Matthew J. Kalos, William R. White, Stephen G. Wilkins, Harry M. Yudenfriend
  • Publication number: 20180101315
    Abstract: A computer-implemented method for determining correct devices to use in a mass volume migration environment includes reading an I/O configuration definition for a plurality of devices in the mass volume migration environment and definition of a second set of the plurality of devices, wherein the plurality of devices comprise a first set of the plurality of devices. The method includes executing a migration and annotating the first set and the second set with status identifiers. The method also includes responsive to completing a migration of a device in the first set to the associated corresponding device in the second set, updating the annotation of the migrated device in the first set and the corresponding device in the second set and swapping the migrated device in the first set with the corresponding device in the second set, and continuing the migration of devices of the first set to the second set.
    Type: Application
    Filed: October 7, 2016
    Publication date: April 12, 2018
    Inventors: SCOTT B. COMPTON, DALE F. RIEDY, HARRY M. YUDENFRIEND
  • Patent number: 9940379
    Abstract: A system for accelerating database transaction processing by controlling data replication is provided. The system includes a first control unit configured to manage a first storage device and at least one second control unit configured to manage a second storage device. The first control unit writes first data to the first storage device and sends the first data to the second control unit in response to receiving from a host a first write command including the first data. The first control unit writes second data to the first storage device without sending the second data to the second control unit in response to receiving from the host a second write command. The second control unit writes the first data to the second storage device in response to receiving the first data. The second control unit writes the second data to the second storage device in response to receiving from the host a third write command.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: April 10, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scott B. Compton, Peter G. Sutton, Harry M. Yudenfriend
  • Publication number: 20180095887
    Abstract: A method of maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system includes issuing, with a processor executing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction including a plurality of device table entries. The method also includes determining, with a host bridge processor, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction, and pinning, with the host bridge processor, a device table entry from a device table based on the determination.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Inventors: David Craddock, Matthias Klein, Eric N. Lais, Harry M. Yudenfriend
  • Publication number: 20180052622
    Abstract: A method for synchronizing primary and secondary read cache in a data replication environment is disclosed. In one embodiment, such a method includes monitoring contents of a primary read cache at a primary site. The method periodically sends, from the primary site to a secondary site, information regarding the contents of the primary read cache, such as a list of storage elements cached in the primary read cache. In certain embodiments, the information also includes temperature information indicating how frequently the storage elements are accessed. The method uses, at the secondary site, the information to substantially synchronize a secondary read cache with the primary read cache. A corresponding system and computer program product are also disclosed herein.
    Type: Application
    Filed: August 22, 2016
    Publication date: February 22, 2018
    Applicant: International Business Machines Corporation
    Inventors: Matthew J. Kalos, Peter G. Sutton, Harry M. Yudenfriend
  • Publication number: 20180024762
    Abstract: A computer-implemented method includes identifying a computer storage environment comprising a primary storage device and one or more secondary storage devices and determining a secondary data retrieval scenario associated with one of the one or more secondary storage devices. The computer-implemented method further includes determining a read-only retrieval arrangement based on the secondary data retrieval scenario. A corresponding computer program product and computer system are also disclosed.
    Type: Application
    Filed: July 22, 2016
    Publication date: January 25, 2018
    Inventors: Scott B. Compton, Trang T. Le, Carol S. Mellgren, John R. Paveza, Dale F. Riedy, Harry M. Yudenfriend
  • Patent number: 9864706
    Abstract: Embodiments of the present invention provide systems, methods, and computer program products for managing computing devices to handle an input/output (I/O) request. In one embodiment, the I/O request may eligible for performance throttling based, at least in part, on the associated importance level for performing the received I/O request and one or more characteristics of the received I/O request. Embodiments of the present invention provide systems, methods, and computer program products for throttling the I/O request and transmitting the I/O request to a storage controller.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Susan K. Candelaria, Scott B. Compton, Deborah A. Furman, Ilene A. Goldman, Matthew J. Kalos, John R. Paveza, Beth A. Peterson, Dale F. Riedy, David M. Shackelford, Harry M. Yudenfriend
  • Patent number: 9852154
    Abstract: According to one embodiment, a method includes receiving device information from a source system; building a virtual device on a host system based at least in part on the received device information; at least one of: transferring a reserve of a device stored on a storage device to a target system; and receiving results of transferring the reserve to the target system; determining if the reserve is held by the target system; recording the reserve if the reserve is held by the target system; and sending a notification that the reserve is not held by the target system if the reserve is not held by the target system. Other methods are also described according to various embodiments.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: December 26, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Mark P. Gardiner, Clint A. Hardy, Matthew J. Kalos, William R. White, Stephen G. Wilkins, Harry M. Yudenfriend
  • Publication number: 20170351443
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices for a control unit managing access by hosts to logical devices configured with capacity from attached physical devices. An alias management group of logical devices and alias addresses assigned to the logical devices is configured. A plurality of requests to establish an association of the host with a logical device and the alias addresses assigned to the logical devices in the alias management group are received from a host. Acknowledgment is made to the host that the association is established in response to determining that the host is assigned the logical devices and alias addresses of the logical devices in the alias management group. The host can use one available alias address assigned to any one of the logical devices to access any one of the logical devices indicated in the association.
    Type: Application
    Filed: June 7, 2016
    Publication date: December 7, 2017
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Publication number: 20170351444
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Application
    Filed: June 7, 2016
    Publication date: December 7, 2017
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Publication number: 20170329557
    Abstract: Provided are a computer program product, system, and method for processing a chain of a plurality of write requests including a commit wait flag and plurality of write requests, wherein each write request group includes write transactions directed to the storage. A determination is made as to whether the commit wait flag has a first value or a second value. The write requests are processed by requiring a current write request comprising one of the write requests being processed to complete before beginning to write data for a next write request following the current write request in the write request chain in response to the commit wait flag having the first value. The write requests are processed by processing the next write request before completing the current write request in response to the commit wait flag having the second value.
    Type: Application
    Filed: May 10, 2016
    Publication date: November 16, 2017
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Publication number: 20170329675
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Application
    Filed: May 10, 2016
    Publication date: November 16, 2017
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend