Patents by Inventor Harsha Vardhan

Harsha Vardhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200011784
    Abstract: An AI-based asset maintenance system accesses a variety of data sources related to an entity to analyze data regarding one or more damage mechanisms corresponding to the entity thereby identifying and implementing corrective actions that mitigate the effects of the damage mechanisms within the entity. The accessed data is stored using a parameterized data model that represents the entity. A trained parameter model identifies the most significant operating parameters for a given component of the entity for the damage mechanism affecting the component. A projection model is used to perform ‘what-if’ analysis of the most significant operating parameters for determining the instances of minimum and maximum degradation due to the damage mechanism. Corrective actions for mitigating the degradation due to the damage mechanism can be determined based on analysis of the operating parameters and other attributes corresponding to the best and worst case degradation scenarios.
    Type: Application
    Filed: July 5, 2018
    Publication date: January 9, 2020
    Applicant: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Harsha Vardhan CHALUMURI, Rabinarayan MISHRA, Ramaa Gopal Varma VEGESNA, Santhosh Kumar SHIVARAM, Sheetal PAWAR
  • Publication number: 20180314430
    Abstract: Methods, non-transitory computer readable media, and computing devices that receive data from a primary storage node. The data is stored in a primary volume within a primary composite aggregate hosted by the primary storage node. A determination is made when the data is tagged to indicate that the data is stored in the primary volume on a remote data storage device of the primary composite aggregate. The data is stored on another remote data storage device without storing the data in a local data storage device, when the determining indicates that the data is tagged to indicate that the data is stored in the primary volume on a remote data storage device of the primary composite aggregate. Accordingly, this technology allows data placement to remain consistent across primary and secondary volumes and facilitates efficient operation of secondary storage nodes by eliminating two-phase writes for data stored on cloud storage devices.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Inventors: Tijin George, Jose Mathew, Harsha Vardhan Reddy Perannagari
  • Patent number: 9960985
    Abstract: A primary and secondary card are coupled to protect and working paths, respectively providing a redundant connection to a node. The primary and secondary cards implement an inter-card path that is a working path for the primary card and a protect path for the secondary card. Responsive to a fault in the working path, the secondary card generates a simulated error condition on the inter-card path, causing the primary card to make the protect path the active path. When the protect path is the active path and goes down, the primary card generates a simulated error condition on the inter-card path, causing the secondary card to make the working path the active path. Switching of packets to the active and protect paths on the primary and secondary cards and is performed by an FPGA that maintains its own state machine subject to instructions from software executed by the cards.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: May 1, 2018
    Assignee: Ciena Corporation
    Inventors: Corry Alexander Cordes, Harsha Vardhan Kovuru, Balaji Subramaniam
  • Publication number: 20170070410
    Abstract: A primary and secondary card are coupled to protect and working paths, respectively providing a redundant connection to a node. The primary and secondary cards implement an inter-card path that is a working path for the primary card and a protect path for the secondary card. Responsive to a fault in the working path, the secondary card generates a simulated error condition on the inter-card path, causing the primary card to make the protect path the active path. When the protect path is the active path and goes down, the primary card generates a simulated error condition on the inter-card path, causing the secondary card to make the working path the active path. Switching of packets to the active and protect paths on the primary and secondary cards and is performed by an FPGA that maintains its own state machine subject to instructions from software executed by the cards.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 9, 2017
    Inventors: Corry Alexander CORDES, Harsha Vardhan KOVURU, Balaji SUBRAMANIAN
  • Patent number: 9531625
    Abstract: A primary and secondary card are coupled to protect and working paths, respectively providing a redundant connection to a node. The primary and secondary cards implement an inter-card path that is a working path for the primary card and a protect path for the secondary card. Responsive to a fault in the working path, the secondary card generates a simulated error condition on the inter-card path, causing the primary card to make the protect path the active path. When the protect path is the active path and goes down, the primary card generates a simulated error condition on the inter-card path, causing the secondary card to make the working path the active path. Switching of packets to the active and protect paths on the primary and secondary cards and is performed by an FPGA that maintains its own state machine subject to instructions from software executed by the cards.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: December 27, 2016
    Assignee: Ciena Corporation
    Inventors: Corry Alexander Cordes, Harsha Vardhan Kovuru, Balaji Subramaniam
  • Publication number: 20160218967
    Abstract: A primary and secondary card are coupled to protect and working paths, respectively providing a redundant connection to a node. The primary and secondary cards implement an inter-card path that is a working path for the primary card and a protect path for the secondary card. Responsive to a fault in the working path, the secondary card generates a simulated error condition on the inter-card path, causing the primary card to make the protect path the active path. When the protect path is the active path and goes down, the primary card generates a simulated error condition on the inter-card path, causing the secondary card to make the working path the active path. Switching of packets to the active and protect paths on the primary and secondary cards and is performed by an FPGA that maintains its own state machine subject to instructions from software executed by the cards.
    Type: Application
    Filed: January 28, 2015
    Publication date: July 28, 2016
    Inventors: Corry Alexander Cordes, Harsha Vardhan Kovuru, Balaji Subramaniam
  • Patent number: 9109006
    Abstract: Aspects of the present application relate to molecular weight markers of glatiramer acetate for accurate determination of the average molecular weight of glatiramer acetate.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: August 18, 2015
    Inventors: Santhanakrishnan Srinivasan, Karthik Ramasamy, Chakravarthula Kalyan Narasimham Nallam, Yagna Kiran Kumar Komaravolu, Sudheer Reddy Kallam, Bala Harsha Vardhan Ganji, Ravindra Chary Bathoju, Basanthi Devi
  • Publication number: 20130205877
    Abstract: Aspects of the present application relate to molecular weight markers of glatiramer acetate for accurate determination of the average molecular weight of glatiramer acetate.
    Type: Application
    Filed: July 28, 2011
    Publication date: August 15, 2013
    Applicants: DR. REDDY'S LABORATORIES, INC., DR. REDDY'S LABORATORIES LTD.
    Inventors: Santhanakrishnan Srinivasan, Karthik Ramasamy, Chakravarthula Kalyan Narasimham Nallam, Yagna Kiran Kumar Komaravolu, Sudheer Reddy Kallam, Bala Harsha Vardhan Ganji, Ravindra Chary Bathoju, Basanthi Devi
  • Patent number: 7356609
    Abstract: An optimized interface for handling routed and non-routed point-to-point sessions is provided. According to one exemplary aspect, when a PPP session is established for a client, an interface data structure or module is dynamically created for the client corresponding to the PPP session. The interface data structure includes, for example, Layer-2 and Layer-3 information relating to the PPP session. Upon its creation, the interface data structure is linked to the optimized interface. The created interface data structure is then used by the optimized interface to facilitate communications with the client for the duration of the PPP session.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: April 8, 2008
    Assignee: Network Equipment Technologies, Inc.
    Inventors: Bhasker Allam, Harsha Vardhan Jagannati