Abstract: In a method of making a semiconductor device, the method includes: forming a first conductive layer over a substrate; forming an insulating layer on the first conductive layer; forming a via through the insulating layer to expose the first conductive layer; forming a self-assembled monolayer (SAM) over a bottom of the via; forming a barrier layer at a sidewall of the via; removing the SAM over the bottom of the via; and forming a second conductive layer over the barrier layer and the bottom of the via such that the first conductive layer is electrically connected to the second conductive layer without the barrier layer between the first conductive layer and the second conductive layer at the bottom of the via.

Abstract: A method of manufacturing metallic interconnects for an integrated circuit includes forming an interconnect layout including at least one line including a non-diffusing material, forming a diffusing barrier layer on the line, forming an opening extending completely through the diffusing barrier layer and exposing a portion of the line, depositing a diffusing layer on the diffusing barrier layer such that a portion of the diffusing layer contacts the portion of the line, and thermally reacting the diffusing layer to form the metallic interconnects. Thermally reacting the diffusing layer chemically diffuses a material of the diffusing layer into the at least one line and causes at least one crystalline grain to grow along a length of the at least one line from at least one nucleation site defined at an interface between the portions of the diffusing layer and the line.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a first conductive layer on a substrate and selectively forming a second insulating layer on the first insulating layer. The first insulating layer may include a recess, and the first conductive layer may be in the recess of the first insulating layer. The second insulating layer may include a first opening exposing a surface of the first conductive layer. The methods may also include forming a third insulating layer on the second insulating layer and the first conductive layer, forming a second opening extending through the third insulating layer and exposing the first conductive layer, and forming a second conductive layer in the second opening.

Abstract: In a method of making a semiconductor device, the method includes: forming a first conductive layer over a substrate; forming an insulating layer on the first conductive layer; forming a via through the insulating layer to expose the first conductive layer; forming a self-assembled monolayer (SAM) over a bottom of the via; forming a barrier layer at a sidewall of the via; removing the SAM over the bottom of the via; and forming a second conductive layer over the barrier layer and the bottom of the via such that the first conductive layer is electrically connected to the second conductive layer without the barrier layer between the first conductive layer and the second conductive layer at the bottom of the via.

Abstract: A method of manufacturing metallic interconnects for an integrated circuit includes forming an interconnect layout including at least one line including a non-diffusing material, forming a diffusing barrier layer on the line, forming an opening extending completely through the diffusing barrier layer and exposing a portion of the line, depositing a diffusing layer on the diffusing barrier layer such that a portion of the diffusing layer contacts the portion of the line, and thermally reacting the diffusing layer to form the metallic interconnects. Thermally reacting the diffusing layer chemically diffuses a material of the diffusing layer into the at least one line and causes at least one crystalline grain to grow along a length of the at least one line from at least one nucleation site defined at an interface between the portions of the diffusing layer and the line.

Abstract: Organometallic precursors and methods for deposition on a substrate in seed/barrier applications are herein disclosed. In some embodiments, the organometallic precursor is a ruthenium-containing, tantalum-containing precursor or combination thereof and may be deposited by atomic layer deposition, chemical vapor deposition and/or physical vapor deposition.

Abstract: Cu interconnect structures using a bottomless liner to reduce the copper interfacial electron scattering and lower the electrical resistance are described in this application. The interconnect structures comprise a nucleation layer and a liner layer that may be formed by an oxide or nitride. The bottom portion of the liner layer is removed to expose the nucleation layer. Since the liner is bottomless, the nucleation layer is exposed during Cu deposition and serves to catalyze copper nucleation and enable selective growth of copper near the bottom (where the nucleation layer is exposed), rather than near the liner sidewalls. Thus, copper may be selectively grown with a bottom-up fill behavior than can reduce or eliminate formation of voids. Other embodiments are described.

Abstract: In one embodiment, the present invention includes a method for depositing a barrier layer on a substrate having a trench, depositing a liner layer on the barrier layer that includes a surface oxide, electrolessly depositing a copper seed layer on the liner layer, where the surface oxide is reduced in-situ in an electroless bath, depositing a bulk metal layer on the copper seed layer. Other embodiments are described and claimed.

Abstract: In one embodiment, the present invention includes a method for depositing a barrier layer on a substrate having a trench, depositing a liner layer on the barrier layer that includes a surface oxide, electrolessly depositing a copper seed layer on the liner layer, where the surface oxide is reduced in-situ in an electroless bath, depositing a bulk metal layer on the copper seed layer. Other embodiments are described and claimed.

Abstract: Organometallic precursors and methods for deposition on a substrate in seed/barrier applications are herein disclosed. In some embodiments, the organometallic precursor is a ruthenium-containing, tantalum-containing precursor or combination thereof and may be deposited by atomic layer deposition, chemical vapor deposition and/or physical vapor deposition.

Abstract: A method for forming a metal interconnect comprises providing a dielectric layer on a substrate within a reaction chamber where the dielectric layer includes a trench, conformally depositing a barrier layer on the dielectric layer within the trench, conformally depositing a Cu—Al alloy layer on the barrier layer within the trench, depositing a copper layer to fill the trench, and planarizing the copper layer to form the metal interconnect. The Cu—Al alloy layer may be formed by sequential ALD or CVD deposition of an aluminum layer and a copper layer followed by an annealing process. Alternately, the Cu—Al alloy layer may be formed in-situ by co-pulsing the aluminum and copper precursors.

Abstract: A method for carrying out a damascene process to form an interconnect comprises providing a semiconductor substrate having a trench etched into a dielectric layer, wherein the trench includes a barrier layer and an adhesion layer, depositing a copper seed layer onto the adhesion layer using an ALD process, depositing an iodine catalyst layer onto the copper seed layer using an ALD process, and depositing a copper layer onto the copper seed layer using an ALD process. The iodine catalyst layer causes the copper layer to fill the trench by way of a bottom-up fill mechanism. The trench fill is performed using a single ALD process, which minimizes the creation of voids and seams in the final copper interconnect.

Abstract: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.

Abstract: Chemical phase deposition processes utilizing organometallic precursors to form thin films are herein described. The organometallic precursors may include a single metal center or multiple metal centers. The chemical phase deposition may be chemical vapor deposition (CVD), atomic layer deposition (ALD), or hybrid CVD and ALD. The use of these chemical phase deposition processes with the organometallic precursors allows for the conformal deposition of films within openings having widths of less than 100 nm and more particularly less than 50 nm to form thin films such as barrier layers, seed layers, and adhesion layers.

Abstract: A method comprising introducing an organometallic precursor according to a first set of conditions in the presence of a substrate; introducing the organometallic precursor according to a different second set of conditions in the presence of the substrate; and forming a layer comprising a moiety of the organometallic precursor on the substrate according to an atomic layer deposition process. A system comprising a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board, the microprocessor comprising a substrate having a plurality of circuit devices with electrical connections made to the plurality of circuit devices through interconnect structures formed in a plurality of dielectric layers formed on the substrate and each of the plurality of interconnect structures separated from the plurality of dielectric layers by a barrier layer formed according to an atomic layer deposition process.

Abstract: Chemical phase deposition processes utilizing organometallic precursors to form thin films are herein described. The organometallic precursors may include a single metal center or multiple metal centers. The chemical phase deposition may be chemical vapor deposition (CVD), atomic layer deposition (ALD), or hybrid CVD and ALD. The use of these chemical phase deposition processes with the organometallic precursors allows for the conformal deposition of films within openings having widths of less than 100 nm and more particularly less than 50 nm to form thin films such as barrier layers, seed layers, and adhesion layers.

Abstract: A slurry for use in a chemical mechanical polishing process for planarizing copper-based metal structures on a substrate comprises an oxidizer, an organic complexing agent, surfactants, and a plurality of copper-based metal abrasive particles, wherein the copper in the copper-based metal is capable of dissolving into the slurry and forming copper ion complexes. During the chemical mechanical polishing process, the copper removal rate may be selectively increased by increasing the concentration of copper metal abrasive particles in the slurry, and the copper removal rate may be selectively decreased by decreasing the concentration of copper metal abrasive particles in the slurry.

Abstract: An apparatus with a plating container with at least two anodes is described herein.