Patents by Inventor Haruo Kojima
Haruo Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11252814Abstract: A grounding structure of the high-frequency circuit board includes a dielectric substrate, a back surface ground electrode, an upper ground electrode, and a microstripline upper electrode. The dielectric substrate has a first surface and a second surface, and is provided with a first through-hole. A first opening of the first through-hole at the first surface is smaller than a second opening of the first through-hole at the second surface. A first grounding conductor layer is provided in the first through-hole. The back surface ground electrode is provided at the second surface and is connected with the first grounding conductor layer. The upper ground electrode is provided at the first surface and is connected with the first ground conductor layer. The microstripline upper electrode is provided at the first surface.Type: GrantFiled: May 27, 2019Date of Patent: February 15, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATIONInventors: Yasuaki Asahi, Haruo Kojima
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Publication number: 20200344874Abstract: A grounding structure of the high-frequency circuit board includes a dielectric substrate, a back surface ground electrode, an upper ground electrode, and a microstripline upper electrode. The dielectric substrate has a first surface and a second surface, and is provided with a first through-hole. A first opening of the first through-hole at the first surface is smaller than a second opening of the first through-hole at the second surface. A first grounding conductor layer is provided in the first through-hole. The back surface ground electrode is provided at the second surface and is connected with the first grounding conductor layer. The upper ground electrode is provided at the first surface and is connected with the first ground conductor layer. The microstripline upper electrode is provided at the first surface.Type: ApplicationFiled: May 27, 2019Publication date: October 29, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATIONInventors: Yasuaki ASAHI, Haruo KOJIMA
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Patent number: 8581664Abstract: A pulse electric power amplification apparatus includes first, second, final-stage and drive amplification devices. In initial stage, the first device in upstream, having a predetermined thermal time constant, receives a high frequency signal while the second device in downstream, having a different thermal time constant, is cascade-connected to it. In final stage, the drive device drives the final-stage device in downstream, which is cascade-connected to the second device. The apparatus further includes a power supply switching circuit, first and second differentiating circuits. The first and second differentiating circuits, having time constants corresponding to thermal time constants of the first and second devices, respectively, receive a pulse signal with which the high frequency signal is modulated.Type: GrantFiled: December 20, 2011Date of Patent: November 12, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Publication number: 20120268209Abstract: An embodiment includes a first amplification device receiving a high frequency signal in an upstream stage in an initial stage unit and having a predetermined thermal time constant, a second amplification device in a downstream stage cascade-connected to the first amplification device and having a thermal time constant different from that of the first amplification device, and a final stage amplification device cascade-connected in a final stage downstream of the second amplification device.Type: ApplicationFiled: December 20, 2011Publication date: October 25, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Haruo KOJIMA
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Patent number: 8259686Abstract: There is provided one exemplary array antenna system having a plurality of arrayed element antennas and transmit/receive modules that are respectively connected with those element antennas and that apply a predetermined phase shift amount to transmitting signals to be supplied to the element antennas and to received signals received by the element antennas, wherein the transmit/receive module has one transmitting path that is connected to first and second element antennas and that amplifies and distributes the transmitting signal to the first and second element antennas after applying a predetermined transmitting phase shift amount and two receiving paths that amplify and apply respectively a receiving phase shift amount to the received signals received from the first and second element antennas.Type: GrantFiled: November 26, 2008Date of Patent: September 4, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Kanto, Haruo Kojima, Tooru Tanaka
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Patent number: 8223080Abstract: A transmission and reception module according to one embodiment of the present invention includes an antenna, a transmission circuit, a wave detection circuit, a high-frequency switch, a small-signal high-frequency diode limiter circuit, and a first power amplifier. The antenna transmits a transmission wave, or receives a reception wave. The transmission circuit is connected to the antenna via a circulator and supplies the transmission wave to the antenna. The wave detection circuit is connected to the antenna via the circulator and branches the reception wave received by the antenna to generate a control signal based on one branched reception wave. The high-frequency switch is connected to the wave detection circuit and suppresses a power of the other branched reception wave when the control signal is input thereto.Type: GrantFiled: June 1, 2010Date of Patent: July 17, 2012Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Publication number: 20110057860Abstract: A transmission and reception module according to one embodiment of the present invention includes an antenna, a transmission circuit, a wave detection circuit, a high-frequency switch, a small-signal high-frequency diode limiter circuit, and a first power amplifier. The antenna transmits a transmission wave, or receives a reception wave. The transmission circuit is connected to the antenna via a circulator and supplies the transmission wave to the antenna. The wave detection circuit is connected to the antenna via the circulator and branches the reception wave received by the antenna to generate a control signal based on one branched reception wave. The high-frequency switch is connected to the wave detection circuit and suppresses a power of the other branched reception wave when the control signal is input thereto.Type: ApplicationFiled: June 1, 2010Publication date: March 10, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Haruo KOJIMA
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Patent number: 7781259Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.Type: GrantFiled: September 7, 2006Date of Patent: August 24, 2010Assignee: Fujitsu Semiconductor LimitedInventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
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Publication number: 20090156138Abstract: There is provided one exemplary array antenna system having a plurality of arrayed element antennas and transmit/receive modules that are respectively connected with those element antennas and that apply a predetermined phase shift amount to transmitting signals to be supplied to the element antennas and to received signals received by the element antennas, wherein the transmit/receive module has one transmitting path that is connected to first and second element antennas and that amplifies and distributes the transmitting signal to the first and second element antennas after applying a predetermined transmitting phase shift amount and two receiving paths that amplify and apply respectively a receiving phase shift amount to the received signals received from the first and second element antennas.Type: ApplicationFiled: November 26, 2008Publication date: June 18, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhiro KANTO, Haruo Kojima, Tooru Tanaka
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Patent number: 7436353Abstract: A transmitting-receiving module of a radar system which is an embodiment of the present invention, includes, a transmitting circuit for sending transmitting RF signal, a three terminal circulator having three terminals and with the first terminal of which is connected a transmitting-receiving antenna, a first RF switch which is connected with the second terminal of the three terminal circulator and the output can be switched over, a second RF switch with input which can be switched over, an attenuator connected between the first RF switch and the second switch, and a receiving circuit connected with the output terminal of the second RF switch, when radar signal is being transmitted, the first RF switch is connected with the attenuator, and the second RF switch is not connected with the attenuator, when radar signal is being received, the first RF switch is connected with the second RF switch directly or connected through a low noise amplifier.Type: GrantFiled: August 25, 2006Date of Patent: October 14, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Patent number: 7423491Abstract: A first power source 11 for supplying a bias voltage to a gate electrode G of a field effect transistor 13, which amplifies high-frequency signals, and a second power source 15 for supplying a bias voltage to a drain electrode D of the field effect transistor 13 are provided. The protective resistance 12 is connected between the gate electrode G of the field effect transistor 13 and the first power source 11, and the bias voltage controller 14 is connected between the drain electrode D of the field effect transistor 13 and the second power source 11. Further, a voltage detector 16 is connected between both ends of the protective resistance 12 to detect a voltage drop generated between both ends of the protective resistance 12, when a rectified current flows to the gate electrode G from the drain electrode D of the field effect transistor 13.Type: GrantFiled: April 30, 2007Date of Patent: September 9, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Patent number: 7372315Abstract: A switching circuit includes a semiconductor switching element having a control electrode and a source-drain current path, the source-drain current path being connected between a voltage source and a load circuit, a parallel circuit formed by first and second transistors having respective collector-emitter paths connected between the control electrode of the semiconductor switching element and a reference potential point, a first resistor connected to the second transistor in series, a differential circuit connected between a control signal terminal and the base of the first transistor and a second resistor connected between the control signal terminal and the base of the second transistor. The first transistor is made conductive by a signal obtained by differentiating a control signal and subsequently the second transistor is made conductive to control the semiconductor switching element for ON/OFF.Type: GrantFiled: May 25, 2006Date of Patent: May 13, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Publication number: 20070252650Abstract: A first power source 11 for supplying a bias voltage to a gate electrode G of a field effect transistor 13, which amplifies high-frequency signals, and a second power source 15 for supplying a bias voltage to a drain electrode D of the field effect transistor 13 are provided. The protective resistance 12 is connected between the gate electrode G of the field effect transistor 13 and the first power source 11, and the bias voltage controller 14 is connected between the drain electrode D of the field effect transistor 13 and the second power source 11. Further, a voltage detector 16 is connected between both ends of the protective resistance 12 to detect a voltage drop generated between both ends of the protective resistance 12, when a rectified current flows to the gate electrode G from the drain electrode D of the field effect transistor 13.Type: ApplicationFiled: April 30, 2007Publication date: November 1, 2007Applicant: KABUSHI KAISHA TOSHIBAInventor: Haruo KOJIMA
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Patent number: 7262668Abstract: A first power source 11 for supplying a bias voltage to a gate electrode G of a field effect transistor 13, which amplifies high-frequency signals, and a second power source 15 for supplying a bias voltage to a drain electrode D of the field effect transistor 13 are provided. The protective resistance 12 is connected between the gate electrode G of the field effect transistor 13 and the first power source 11, and the bias voltage controller 14 is connected between the drain electrode D of the field effect transistor 13 and the second power source 11. Further, a voltage detector 16 is connected between both ends of the protective resistance 12 to detect a voltage drop generated between both ends of the protective resistance 12, when a rectified current flows to the gate electrode G from the drain electrode D of the field effect transistor 13.Type: GrantFiled: June 9, 2005Date of Patent: August 28, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Publication number: 20070115170Abstract: A transmitting-receiving module of a radar system which is an embodiment of the present invention, includes, a transmitting circuit for sending transmitting RF signal, a three terminal circulator having three terminals and with the first terminal of which is connected a transmitting-receiving antenna, a first RF switch which is connected with the second terminal of the three terminal circulator and the output can be switched over, a second RF switch with input which can be switched over, an attenuator connected between the first RF switch and the second switch, and a receiving circuit connected with the output terminal of the second RF switch, when radar signal is being transmitted, the first RF switch is connected with the attenuator, and the second RF switch is not connected with the attenuator, when radar signal is being received, the first RF switch is connected with the second RF switch directly or connected through a low noise amplifier.Type: ApplicationFiled: August 25, 2006Publication date: May 24, 2007Applicant: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Publication number: 20070010046Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.Type: ApplicationFiled: September 7, 2006Publication date: January 11, 2007Applicant: FUJITSU LIMITEDInventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
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Publication number: 20060267667Abstract: A switching circuit includes a semiconductor switching element having a control electrode and a source-drain current path, the source-drain current path being connected between a voltage source and a load circuit, a parallel circuit formed by first and second transistors having respective collector-emitter paths connected between the control electrode of the semiconductor switching element and a reference potential point, a first resistor connected to the second transistor in series, a differential circuit connected between a control signal terminal and the base of the first transistor and a second resistor connected between the control signal terminal and the base of the second transistor. The first transistor is made conductive by a signal obtained by differentiating a control signal and subsequently the second transistor is made conductive to control the semiconductor switching element for ON/OFF.Type: ApplicationFiled: May 25, 2006Publication date: November 30, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Haruo KOJIMA
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Patent number: 7123089Abstract: An amplifier includes a plurality of power amplifier elements connected in cascaded multiple stages, a first bias power supply, a second bias power supply, a switching circuit configured to switch a first output supplied from the first bias power supply in response to a modulation pulse so as to transmit the first output to the plurality of power amplifier elements, a pulse differentiating circuit configured to differentiate the modulation pulse by a given time constant, and an adder circuit configured to add the differentiated modulation pulse and a second output of the second bias power supply so as to transmit the differentiated modulation pulse added to the second output as an input bias voltage to at least one of the plurality of power amplifier elements except for a final stage in the cascaded multiple stages.Type: GrantFiled: August 31, 2004Date of Patent: October 17, 2006Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Patent number: 7122402Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.Type: GrantFiled: February 20, 2004Date of Patent: October 17, 2006Assignee: Fujitsu LimitedInventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
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Publication number: 20060222061Abstract: A transmitter-receiver module includes a first amplifier, a second amplifier, a detection unit, and a control unit. The first amplifier is configured to amplify a transmitter signal, the second amplifier is configured to amplify a receiver signal, the detection unit is configured to detect the receiver signal amplified by the second amplifier, and the control unit is configured to control the first amplifier so as to reduce a level of the signal from the first amplifier when the signal detected by the detection unit exceeds a predetermined level.Type: ApplicationFiled: March 29, 2006Publication date: October 5, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Haruo Kojima