Patents by Inventor Haruo Ohta

Haruo Ohta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5402272
    Abstract: A digital signal magnetic recording/reproducing apparatus subjects a digital signal to a digital amplitude phase shift keying and records and reproduces the modulated signal thus obtained on a magnetic recording medium. Use of the digital amplitude phase shift keying technique makes it possible to remove the direct-current component in the recording signals, and to improve the utilization efficiency of the recording frequency band, thus making high density recording possible. In addition, since a plurality of modulated signals are frequency-multiplexed and recorded, almost the entire frequency band recordable on a magnetic recording medium can be utilized, resulting in an increase in recording density. Further in addition, a pilot signal produced by frequency-converting a carrier is frequency-multiplexed with a modulated signal and recorded and reproduced and the carrier is reproduced from the reproduced pilot signal, so that a redundant part for reproducing the carrier is not necessary.
    Type: Grant
    Filed: January 7, 1994
    Date of Patent: March 28, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Etsuto Nakatsu, Haruo Ohta, Masaaki Kobayashi
  • Patent number: 5299003
    Abstract: A signal processing apparatus for changing the frequency characteristics of an input signal, e.g.--a video or audio signal, allows a signal to pass through a transmission circuit in a positive time sequence and then, allows the signal to be transmitted through another transmission circuit having the same transmission characteristics in a reverse time sequence with respect to the positive time sequence. Also, while the transmission circuit is arranged to have a zero-phase characteristic, each segment of a continuous signal is processed throughout a period which is equal to at least two times a duration of an impulse response direction of the transmission circuit. Accordingly, unwanted wave errors appearing at discontinuous regions of the signals are eliminated.
    Type: Grant
    Filed: March 10, 1992
    Date of Patent: March 29, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsuo Ochi, Masayuki Yoneyama, Yasuo Hamamoto, Akihiro Takeuchi, Masaaki Kobayashi, Haruo Ohta
  • Patent number: 5278846
    Abstract: A decoder for product codes includes a received symbol reliability detector for detecting the reliability of each erase-flag-carrying symbol produced by a row code decoder, and an erase flag adjuster for eliminating the erase flag of a particular symbol which has a higher reliability than a predetermined reference value among erase-flag-carrying symbols supplied from a row code decoder in accordance with a data output of a received symbol reliability detector.
    Type: Grant
    Filed: June 7, 1991
    Date of Patent: January 11, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mutsuyuki Okayama, Haruo Ohta
  • Patent number: 5265125
    Abstract: A signal detection apparatus detects original information from a PCM signal transmitted through a communication channel or reproduced from a recording medium. The apparatus includes: a first equalizer for equalizing the PCM signal so as to decrease intersymbol interference, a clock regenerator for regenerating a clock signal synchronized with a timing of the digital information from an output of the first equalizer; an amplitude detector for detecting an amplitude from the output of the first equalizer and the clock signal; a second equalizer for equalizing the output of the first equalizer to a partial-response equalized signal, and a detecting circuit for detecting the original digital information at a clock timing of the clock signal from the partial-response equalized signal. Accordingly, without being influenced by the amplitude fluctuations of the signal, the original digital information can be detected at a low bit error rate.
    Type: Grant
    Filed: November 14, 1991
    Date of Patent: November 23, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 5255127
    Abstract: In transmission or recording of a digital signal by means of digital amplitude and phase modulation, particularly recording into and reproducing the same from the a magnetic recording medium, a digital amplitude/phase modulated signal to be demodulated is commonly affected by the non-linear amplitude characteristics and the effects of unwanted jitter and envelope variation. As the result, the error rate of decoded data will be increased. For compensation, the Viterbi decoding technique is employed with the use of a weighted distance value calculated by multiplying an Euclidean distance between the signal point of a reproduction signal and the datum point of each code by a positive weighting factor which is determined smaller when the code datum point is located further from the origin point of a coordinate system. Accordingly, the weighted distance of each reproduction signal point from its corresponding datum point can approximately be uniform thus ensuring less error decoding in general.
    Type: Grant
    Filed: July 2, 1991
    Date of Patent: October 19, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Etsuto Nakatsu, Hiroaki Shimazaki, Haruo Ohta, Masaaki Kobayashi
  • Patent number: 5233479
    Abstract: An apparatus for demodulating and decoding a multi-level amplitude modulation signal used to convey digital data, such as a QAM signal, having amplitude modulated carrier components differing in phase. The apparatus derives demodulated data values from that signal, and derives from average values of sets of these data values a set of compensated reference point data respectively corresponding to signal reference points of the multi-level modulation signal which are expressible as a symbol constellation in the I-Q plane. The compensated reference point data are used to obtain correct digital code values from the demodulated data, even if there is considerable distortion of the multi-level amplitude modulated signal, as is the case for such a signal when recorded and reproduced from a magnetic recording medium.
    Type: Grant
    Filed: October 1, 1990
    Date of Patent: August 3, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Etsuto Nakatsu, Haruo Ohta, Masaaki Kobayashi
  • Patent number: 5166955
    Abstract: A signal detection apparatus detects digital information contained in a binary baseband PCM signal transmitted on a communication transmission channel or recorded on a recording medium. A first equalizer equalizes the PCM signal to reduce intersymbol interference. A clock reproducer reproduces a clock signal synchronized with the timing of the digital information using an output signal of the first equalizer. A second equalizer subjects the output signal of the first equalizer to partial response equalization. A decoding circuit decodes the digital information from an output signal of the second equalizer at a timing of the clock signal. A stable clock signal is easily reproduced and the digital information is detected at a lower bit error rate.
    Type: Grant
    Filed: November 26, 1990
    Date of Patent: November 24, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 5051614
    Abstract: A dropout detecting apparatus comprises a phase conversion circuit for converting an input signal into two signals which are different in phase by .pi./2 from each other, two squaring circuits for obtaining squares of the two signals respectively, an addition circuit for adding the two square signals, and an amplitude comparator for comparing the amplitude of an output signal of the addition circuit with a reference value. The output signal of the addition circuit becomes the square of the envelope of the input signal regardless of the phase of the input signal.
    Type: Grant
    Filed: May 23, 1989
    Date of Patent: September 24, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 4994754
    Abstract: A digital FM demodulating apparatus includes a phase detector for detecting the phase of an input digital FM signal; a differentiator for time differentiating the signal from the phase detector to get an instantaneous frequency of the input FM signal; an over-modulation detector for detecting an over-modulation occurence of the input FM signal according to the instantaneous frequency to generate a detection signal, and an over-modulation corrector for obtaining a demodulated output signal which is corrected so as to have no deterioration due to the over-modulation occurrence according to the detection signal from the over-modulation detector.
    Type: Grant
    Filed: May 23, 1989
    Date of Patent: February 19, 1991
    Assignee: Matsushita Electric Industrial Co., Inc.
    Inventor: Haruo Ohta
  • Patent number: 4982191
    Abstract: In converting an analog signal to a digital signal, a clamping apparatus is capable of adjusting the DC level of the analog signal to a predetermined value, and a gain control apparatus is capable of adjusting the amplitude of the analog signal to a predetermined value. Each of such clamping apparatus and gain control apparatus is adapted for use particularly in digitizing a video signal and comprises: a detection circuit for detecting the DC level or the amplitude of the signal digitized by an analog-digital converter; a signal conversion circuit for outputting, in accordance with the detection signal, a three-state signal indicative of a high voltage, a lower voltage or a high impedance; an integrator for integrating such three-state signal; and a feedback loop for controlling, by the integrated signal, the analog signal to be inputted to the analog-digital converter.
    Type: Grant
    Filed: March 22, 1990
    Date of Patent: January 1, 1991
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 4905101
    Abstract: A disclosed time base corrector comprises a clock generater for generating a clock signal whose period is fixed, an analog-to-digital converter for sampling amplitude values of an input analog signal having a time base error at sampling points given by the clock signal, an adaptive interpolation filter for interpolating a correct amplitude value at a resampling indicated by a resampling position signal, a resampling position signal producing circuit for detecting the time base error and producing from the detected error the resampling position signal, and a digital-to-analog converter for converting the interpolated amplitude values to an analog signal which has no time base errors. The time base correction is implemented by pure digital signal processing without any analog signal processing. The time base corrector does not use such a clock signal that has time base fluctuations.
    Type: Grant
    Filed: July 7, 1988
    Date of Patent: February 27, 1990
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Haruo Ohta, Tokikazu Matsumoto
  • Patent number: 4849826
    Abstract: A digital non-linear pre-emphasis/de-emphasis apparatus is arranged such that a frequency band of a high-pass filter for extracting a high frequency component signal of an input signal is varied according to the input signal by feeding back the output signal of the high-pass filter through a first non-linear input/output circuit. The first non-linear input/output circuit multiplies the output signal of the high-pass filter by a coefficient which is a function of the output signal of the high-pass filter to obtain a feedback signal. The output signal of the high-pass filter is also applied to a second non-linear input/output circuit which multiplies the output signal of the high-pass filter by a coefficient which is a function of the output signal of the high-pass filter. An output signal of the second non-linear input/output circuit is mixed with the input signal by an operation circuit to obtain an output signal which is non-linearly emphasized or de-emphasized.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: July 18, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 4827342
    Abstract: A video signal processing apparatus includes a digital vertical filter for passing a signal in a specific vertical high frequency band of a digitized input luminance signal and a digital nonlinear processing circuit having a nonlinear input-output characteristic for nonlinearly processing the signal from the vertical filter so that one of a luminance signal component and a noise component of the signal from the vertical filter is suppressed while the other is maintained as is or so that the luminance signal component is emphasized while the noise component is maintained as is or suppressed. The apparatus also includes an arithmetic operation circuit for arithmetically synthesizing the digitized input luminance signal and an output signal of the nonlinear processing circuit so that the noise component is canceled or the luminance signal is increased, thereby obtaining a digitized luminance signal having an improved signal-to-noise ratio in the specific vertical high frequency band.
    Type: Grant
    Filed: September 24, 1987
    Date of Patent: May 2, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Haruo Ohta, Masao Tomita
  • Patent number: 4825289
    Abstract: A noise reduction apparatus includes a vertical filter for extracting a component having a high vertical frequency from an input video signal, a two-dimensional filter for extracting a component having a low vertical frequency and a high horizontal frequency from the input video signal, a detector for detecting a vertical line image portion from output components of the vertical filter and the two-dimensional filter, and a controllable two-dimensional filter which suppresses a component having a high vertical frequency at the vertical line image portion according to a detection signal from the dector. By this apparatus, the noise superposed on the vertical line image signal is effectively reduced without deteriorating the vertical resolution.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: April 25, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Haruo Ohta
  • Patent number: 4686583
    Abstract: A dropout compensating apparatus used in a video signal recording/reproducing apparatus employs a digital delay circuit such as a digital memory. An input video signal is converted to a digital signal by an A/D converter. The digital signal is applied via a first switch to the digital delay circuit where it is delayed by a specified period. The delayed digital signal is converted to a delayed video signal by a D/A converter. The delayed video signal is applied to a second switch. A dropout detector produces a dropout detected signal when a dropout occurs in the input video signal. The first switch normally passes the digital signal from the A/D converter and is responsive to the dropout detected signal for passing the delayed digital signal from the digital delay circuit back to the digital delay circuit. The second switch normally passes the input video signal as it is and is also responsive to the dropout detected signal for passing the delayed video signal from the D/A converter.
    Type: Grant
    Filed: October 17, 1984
    Date of Patent: August 11, 1987
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masao Tomita, Akio Hashima, Haruo Ohta, Tadaaki Matsuo