Patents by Inventor Harvey C. Nathanson

Harvey C. Nathanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8018053
    Abstract: One example discloses a heat transfer device that can comprise a semiconductor material having a first region and a second region. The first region and the second region are doped to propel a charged carrier from the first region to the second region. The heat transfer device can also comprise an array of pointed tips thermoelectrically communicating with the second region. A heat sink faces the array, and a vacuum tunneling region is formed between the pointed tips and the heat sink. The heat transfer device further can further comprise a power source for biasing the heat sink with respect to the first region. The first region defines an N-type semiconductor material and the second region defines a P-type semiconductor material.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: September 13, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Harvey C. Nathanson, Robert M. Young, Joseph T. Smith, Robert S. Howell, Archer S. Mitchell
  • Patent number: 7868358
    Abstract: A device includes a coiling layer, a circuit device layer and active microelectronic circuitry fabricated on the circuit device layer. The coiling layer is formed onto a surface of and coupled to the circuit device layer. The coiling layer having intrinsic stresses which cause coiling of the coiling layer and the circuit device layer including the microelectronic circuitry as the circuit device layer is released from an underlying substrate. A coiled circuit device is formed.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: January 11, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Joseph Smith, Harvey C. Nathanson, Robert S. Howell, Christopher F. Kirby, Garrett A. Storaska
  • Patent number: 7795647
    Abstract: A curled transistor comprises a coiled semiconductor substrate having a plurality of concentrically curled layers. Source and drain regions are configured on a portion of the coiled semiconductor substrate, and a gate dielectric is positioned between the source and drain regions. A first set of metallic contacts electrically couple to the source region on the coiled semiconductor substrate and a second set of metallic contacts electrically couple to the drain region on the coiled semiconductor substrate.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: September 14, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Garrett A. Storaska, Robert S. Howell, Harvey C. Nathanson, Francis William Hopwood
  • Patent number: 7667283
    Abstract: A coiled camera includes a coiling layer, a circuit device layer, active microelectronic circuitry fabricated on the circuit device layer, a semiconductor imaging device electronically coupled to the active microelectronic circuitry and a lens coupled to the semiconductor imaging device.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: February 23, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Joseph T. Smith, Harvey C. Nathanson
  • Publication number: 20090194870
    Abstract: The disclosure relates to a Point Cooler based on a combination of principles, including large area, low current density PN junction cooling, and electron emission from heavily doped shallowly-depleted P tips. Using Junction Cooling rather than thermoelectric cooling enables an all silicon device to be made that favorably competes with the commercial thermoelectric cooling systems. Theoretical values of THOT/TCOLD of 6 or more (in contrast to about 1.5 for other solid state refrigerators) predict this single-stage solid state vacuum electronic cooler can approach 50K at light loading, significantly lower than conventional Bismuth Telluride based thermo electrics. The high Z values for PN junction cooling with wire connection and Tunnel heat extraction opens up solid state vibration-less form fit and function replacement cooling.
    Type: Application
    Filed: January 31, 2008
    Publication date: August 6, 2009
    Inventors: Harvey C. Nathanson, Robert M. Young, Joseph T. Smith, Robert S. Howell, Archer S. Mitchell
  • Patent number: 7488994
    Abstract: A coiled circuit device is produced by forming a circuit layer on a substrate. Optional insulator layers may be disposed above and below the circuit layer. The circuit layer, which may be memory, control, or other circuitry, is released from the substrate such that it coils into a dense, coiled device. A stressed coiling layer may be included which effects coiling when the circuit layer is released.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: February 10, 2009
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Robert S. Howell, Garrett A. Storaska
  • Patent number: 7164811
    Abstract: A small portable “pocket pen size” projector/image grabber device for allowing an individual to gather, share and exploit information in a projected format in real time, day or night, with other individuals on demand. An ultra high density MEMS mirror display array provides a 1024×768 line projection display. An on-axis 512×384 color CCD imager is also included resulting in a digitally-aligned image capture and overlay display capability. A sequentially-addressed three color chip laser and low cost plastic optics provides full color high resolution bright displays for group viewing. 3-D color imaging is also provided by a binocular attachment to the device which permits the capturing of three-dimensional imagery.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: January 16, 2007
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Robert S. Howell, Ragini Saxena, Garrett A. Storaska
  • Patent number: 7119942
    Abstract: A micro-electrical mechanical system (MEMS) mirror assembly including an array of micro-mirrors formed on a substrate and having springs on one side and which angularly tilt between ON and OFF states in response to an electrostatic force generated by a voltage applied to an electrode located on the substrate. At least one, but preferably two springs in the form of two thin strips of metal attach to post(s) at the side edge of the mirror and act as springs which provide a restoring force when the mirror is tilted between an OFF state which occurs when the mirror is flat relative to the substrate with no voltage applied, and in the ON state when the mirror is tilted when a voltage is applied.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 10, 2006
    Assignee: Northrop Gruman Corporation
    Inventors: Harvey C. Nathanson, Robert S. Howell, Garrett A. Storaska, John B. Goodell, Stephen D. Vancampen
  • Patent number: 7102472
    Abstract: A MEMS device having a support frame positioned on a substrate surrounding a first electrode. A rigid flange portion at the top of the support frame is closely space from, and is connected to, a second electrode by relatively short spring members. RF conductors connected to respective first and second electrodes complete an RF switch. A dielectric layer on the first electrode forms a capacitive type device and includes an electrostatic shield layer on its surface. This electrostatic shield layer is connected to ground by a multi megohm bleeder resistance.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: September 5, 2006
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Christopher Kirby, Robert Tranchini, Robert M. Young
  • Patent number: 6570459
    Abstract: Physics package apparatus for a cell type atomic clock includes a cell structure having a central plate sandwiched between top and bottom plates. The central plate has a central interior aperture which together with the top and bottom plates forms an internal cavity for containment of an active vapor. The central plate includes a reservoir for holding a source of the active vapor, and a channel connecting the reservoir with the internal cavity. A heater is provided on the underside of the bottom plate for heating the vapor. The plates are batch processed on respective wafers which are subsequently joined together and cut into individual cell structures.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: May 27, 2003
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Irving Liberman
  • Patent number: 6486511
    Abstract: A solid state microwave switch having a plurality of adjacent parallel fingers covered with an oxide layer. One end of a finger is an N+ source region while the other end is an N+ drain region, with a current conducting N region between them. The oxide layer is covered with a gate layer to which a gate signal is applied for control of current between the N+ regions through the N region. The gate layer is highly resistive and has a sheet resistance on the order of millions of ohms per square. The length from the source to drain region is around 2 &mgr;m, and the fingers are spaced with a pitch of around 1 &mgr;m.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: November 26, 2002
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Philip C. Smith, R. Chris Clarke, David M. Krafcsik, Lawrence E. Dickens
  • Patent number: 6426679
    Abstract: An atomic clock of the type having a cell filled with an active vapor through which is projected a light beam. A detector of the projected light provides corresponding detector signals to a microprocessor. An rf frequency synthesizer provides a microwave signal to a microwave cavity adjacent the cell and also provides a clock standard output signal. The rf frequency synthesizer includes a fractional-N frequency synthesizer which compares signals from a voltage controlled crystal reference oscillator and a voltage controlled oscillator. The fractional-N frequency synthesizer is operable to provide an output control signal to precisely lock the voltage controlled oscillator microwave output signal with the voltage controlled crystal reference oscillator signal. The fractional-N frequency synthesizer also periodically causes a predetermined desired dither in the microwave signal.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: July 30, 2002
    Assignee: Northrop Grumman Corporation
    Inventors: Tod A. Oblak, Harvey C. Nathanson
  • Publication number: 20020075079
    Abstract: An atomic clock of the type having a cell filled with an active vapor through which is projected a light beam. A detector of the projected light provides corresponding detector signals to a microprocessor. An rf frequency synthesizer provides a microwave signal to a microwave cavity adjacent the cell and also provides a clock standard output signal. The rf frequency synthesizer includes a fractional-N frequency synthesizer which compares signals from a voltage controlled crystal reference oscillator and a voltage controlled oscillator. The fractional-N frequency synthesizer is operable to provide an output control signal to precisely lock the voltage controlled oscillator microwave output signal with the voltage controlled crystal reference oscillator signal. The fractional-N frequency synthesizer also periodically causes a predetermined desired dither in the microwave signal.
    Type: Application
    Filed: December 14, 2000
    Publication date: June 20, 2002
    Inventors: Tod A. Oblak, Harvey C. Nathanson
  • Patent number: 6191754
    Abstract: An electronically steerable antenna array which includes time delay units connected to individual antenna elements for time delaying a microwave signal to and/or from the antenna elements. Each time delay unit includes small mercury wetted switches for controlling signal flow via a time delay path or a bypass path, through the time delay unit from a signal input to a signal output.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: February 20, 2001
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Thomas J. Smith, Jr., Carl B. Freidhoff, F. William Hopwood, James E. Degenford, J. Douglas Adam
  • Patent number: 5969385
    Abstract: Transistors have source, drain and channel regions all of the same conductivity type. The channel region is very thin, not more than about 500 .ANG. and preferably about 300 .ANG. or even 100 .ANG. in thickness. A very thin oxide layer having a thickness of much less than about 100 .ANG., such as 20 .ANG. and preferably about 5 to about 10 .ANG., isolates a gate electrode from the channel region. When operated at temperatures at or below 150.degree. K, such as 77.degree. K, very low threshold voltages, well below 25 millivolts, are achieved. Gigahertz speed complementary MOS transistors, formed by adjacent NNN and PPP devices exhibit power-delay products of about 1E-16 joules operating at supply voltages on order 100 millivolts or lower, making this technology of particular interest for multi-gigahertz processing rates at very low power.
    Type: Grant
    Filed: August 16, 1996
    Date of Patent: October 19, 1999
    Assignee: Northrop Grumman Corporation
    Inventor: Harvey C. Nathanson
  • Patent number: 5912606
    Abstract: A switch having spaced apart conductors with a high resistivity gate member therebetween. First and second mercury droplets are respectively connected to the ends of the conductors. When a control signal is applied to the gate member, the mercury droplets are drawn to it and establish electrical connection between the conductors to close the switch. Upon removal of the control signal the mercury droplets separate and assume their initial droplet form thus opening the switch.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: June 15, 1999
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Thomas J. Smith, Jr., Carl B. Freidhoff, F. William Hopwood, James E. Degenford, J. Douglas Adam
  • Patent number: 5896105
    Abstract: An array of individual and autonomous modules are deployed in a region to be surveilled. Each module, contained in an air dropable bomblet, includes a GPS system for determining the exact location of the deployed module. The module also includes an rf receiver and transmitter, as well as an atomic clock circuit for providing highly precise time and clocking signals, with operation of the module circuitry being governed by a control computer. The computers of the modules are individually programmed such that the modules of the array collectively operate as a distributed phased array antenna system, but without any hardwired interconnection between the modules. In another embodiment a single receiver is utilized and the apparatus operates on the frequency set of the GPS system.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: April 20, 1999
    Assignee: Northrop Grumman Corporation
    Inventors: John H. Murphy, Laurence E. Kline, Harvey C. Nathanson, Harry V. Winsor
  • Patent number: 5696514
    Abstract: A coherent signal generated at a precise frequency determined by an atomic clock is transmitted by a moveable object. A receiver station compares the frequency of the coherent signal received from the moving object with a second coherent signal generated at the same precise frequency by an atomic clock in the receiver to determine the radial component of the velocity of the moveable object relative to the receiver as a function of the doppler shift of the transmitted signal. Low cost, low power, miniature atomic clocks with an accuracy of 10.sup.-11 make possible accurate measurements of velocities of only centimeters per second. Such velocity measurement can be used to enhance radar tracking in air traffic control and collision avoidance systems.
    Type: Grant
    Filed: February 28, 1996
    Date of Patent: December 9, 1997
    Assignee: Northrop Grumman Corporation
    Inventors: Harvey C. Nathanson, Charles W. Einolf, Jr., James L. McShane, Elbert L. Cole, Jr.
  • Patent number: 5449953
    Abstract: A silicon-based monolithic microwave integrated circuit architecture is described. This architecture, called MICROX.TM., is a combination of silicon material growth and wafer processing technologies. A wafer is fabricated using a substrate of high resistivity silicon material. An insulating layer is formed in the wafer below the surface area of active silicon, preferably using the SIMOX process. A monolithic circuit is fabricated on the wafer. A ground plane electrode is formed on the back of the wafer. Direct current and rf capacitive losses under microstrip interconnections and transistor source and drain electrodes are thereby minimized. Reduction in the resistivity of the substrate material as a result of CMOS processing can be minimized by maintaining a shielding layer over the bottom surface of the wafer. Microstrip and airbridge connectors, salicide processing and nitride side wall spacing can be used to further enhance device performance.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: September 12, 1995
    Assignee: Westinghouse Electric Corporation
    Inventors: Harvey C. Nathanson, Michael W. Cresswell, Thomas J. Smith, Jr., Lewis R. Lowry, Jr., Maurice H. Hanes
  • Patent number: 5412421
    Abstract: A sensor produces signals corresponding to positions of objects within a field of view over time. A motion detector is provided for determining movement of the sensor. Signals from the sensor and the detector go to a processing unit which causes an appropriate modification of the signal received from the sensor to compensate for the movement.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: May 2, 1995
    Assignee: Westinghouse Electric Corporation
    Inventors: Robert A. Hale, Harvey C. Nathanson