Patents by Inventor Hassan Ihs

Hassan Ihs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250141357
    Abstract: A DC-DC power converter with closed loop error compensation may operate in both pulse width modulation (PWM) mode and pulse frequency modulation (PFM) mode. The DC-DC power converter includes type III compensation, and is operable in PWM mode and PFM mode. Use of a bypass switch for an output inductor of the power converter may increase stability of a loop including type III compensation.
    Type: Application
    Filed: November 18, 2024
    Publication date: May 1, 2025
    Applicant: Endura IP Holdings Ltd.
    Inventor: Hassan Ihs
  • Patent number: 12170481
    Abstract: A DC-DC power converter with closed loop error compensation may operate in both pulse width modulation (PWM) mode and pulse frequency modulation (PFM) mode. The DC-DC power converter includes type III compensation, and is operable in PWM mode and PFM mode. Use of a bypass switch for an output inductor of the power converter may increase stability of a loop including type III compensation.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: December 17, 2024
    Assignee: Endura IP Holdings Ltd.
    Inventor: Hassan Ihs
  • Patent number: 11431245
    Abstract: A power delivery system may include a first voltage regulator configured to output an upper intermediate voltage about an expected discharge voltage plateau of a battery for use by the power delivery system, a switched capacitive charge pump configured to down convert the upper intermediate voltage of the first voltage regulator to a lower intermediate voltage, and a second voltage regulator configured to use the lower intermediate voltage to provide power to a load.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 30, 2022
    Assignee: Chaoyang Semiconductor (Shanghai) Co., Ltd.
    Inventor: Hassan Ihs
  • Publication number: 20220247312
    Abstract: A DC-DC power converter with closed loop error compensation may operate in both pulse width modulation (PWM) mode and pulse frequency modulation (PFM) mode. The DC-DC power converter includes type III compensation, and is operable in PWM mode and PFM mode. Use of a bypass switch for an output inductor of the power converter may increase stability of a loop including type III compensation.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 4, 2022
    Inventor: Hassan Ihs
  • Publication number: 20210234461
    Abstract: A power delivery system may include a first voltage regulator configured to output an upper intermediate voltage about an expected discharge voltage plateau of a battery for use by the power delivery system, a switched capacitive charge pump configured to down convert the upper intermediate voltage of the first voltage regulator to a lower intermediate voltage, and a second voltage regulator configured to use the lower intermediate voltage to provide power to a load.
    Type: Application
    Filed: January 28, 2021
    Publication date: July 29, 2021
    Inventor: Hassan Ihs
  • Patent number: 10840869
    Abstract: A digital microphone compresses a large voltage swing signal from a MEMS capacitor to a signal suitable for processing by integrated circuitry. The compression may be performed in an analog domain by selectively coupling adjustment capacitors in parallel to the MEMS capacitor. The digital microphone may decompress the signal in the digital domain using a decompression technique substantially an inverse of the compression performed in the analog domain.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: November 17, 2020
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Patent number: 10798507
    Abstract: A digital microphone includes built-in self-test features. The features may include capability to apply different bias voltages to a MEMS capacitor sensor of the digital microphone, simulating application of different sound pressures to the digital microphone. The features may also include a digital oscillator, for applying a test signal to an analog front end of the microphone.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: October 6, 2020
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Patent number: 10749513
    Abstract: Droop monitors spread across a system-on-chip (SoC) monitor for voltage droops in regulated supply voltage supplied to logic circuitry of the SoC. In the event of a voltage droop, a clock signal supplied to the logic circuitry is stretched, to temporarily increase a period of the clock signal. The droop monitors may include a sensing delay line provided voltage at the regulated supply voltage, and a reference delay line supplied with a reference voltage, with operations of the delay lines monitored to determine a voltage droop.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: August 18, 2020
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Publication number: 20200052668
    Abstract: A digital microphone compresses a large voltage swing signal from a MEMS capacitor to a signal suitable for processing by integrated circuitry. The compression may be performed in an analog domain by selectively coupling adjustment capacitors in parallel to the MEMS capacitor. The digital microphone may decompress the signal in the digital domain using a decompression technique substantially an inverse of the compression performed in the analog domain.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 13, 2020
    Inventor: Hassan Ihs
  • Publication number: 20200053496
    Abstract: A digital microphone includes built-in self-test features. The features may include capability to apply different bias voltages to a MEMS capacitor sensor of the digital microphone, simulating application of different sound pressures to the digital microphone. The features may also include a digital oscillator, for applying a test signal to an analog front end of the microphone.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 13, 2020
    Inventor: Hassan Ihs
  • Publication number: 20190393772
    Abstract: A deglitch circuit, or look-back, may be used to reduce or avoid reacting to a transient overvoltage situation by a voltage regulator. The voltage regulator may delay reacting to an overvoltage situation unless the overvoltage situation persists for more than a first programmable number of cycles.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 26, 2019
    Inventors: Bertrand Diotte, Jason Rau, Hassan Ihs
  • Publication number: 20190267977
    Abstract: Droop monitors spread across a system-on-chip (SoC) monitor for voltage droops in regulated supply voltage supplied to logic circuitry of the SoC. In the event of a voltage droop, a clock signal supplied to the logic circuitry is stretched, to temporarily increase a period of the clock signal. The droop monitors may include a sensing delay line provided voltage at the regulated supply voltage, and a reference delay line supplied with a reference voltage, with operations of the delay lines monitored to determine a voltage droop.
    Type: Application
    Filed: May 8, 2019
    Publication date: August 29, 2019
    Inventor: Hassan Ihs
  • Patent number: 10326364
    Abstract: A DC-DC converter including digital circuitry for determining load current supplied to a load. In some embodiments the digital circuitry determines the load current differently based on whether the DC-DC converter is operating in pulse frequency modulation mode or pulse width modulation mode. In some embodiments the DC-DC converter includes circuitry for determining if a short circuit or over current condition exists.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: June 18, 2019
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventors: Hassan Ihs, Jason Rau
  • Patent number: 10320282
    Abstract: A deglitch circuit, or look-back, may be used to reduce or avoid reacting to a transient overvoltage situation by a voltage regulator. The voltage regulator may delay reacting to an overvoltage situation unless the overvoltage situation persists for more than a first programmable number of cycles.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: June 11, 2019
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventors: Bertrand Diotte, Jason Rau, Hassan Ihs
  • Patent number: 10320375
    Abstract: Droop monitors spread across a system-on-chip (SoC) monitor for voltage droops in regulated supply voltage supplied to logic circuitry of the SoC. In the event of a voltage droop, a clock signal supplied to the logic circuitry is stretched, to temporarily increase a period of the clock signal. The droop monitors may include a sensing delay line provided voltage at the regulated supply voltage, and a reference delay line supplied with a reference voltage, with operations of the delay lines monitored to determine a voltage droop.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: June 11, 2019
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Patent number: 10291120
    Abstract: A boost DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals with different duty cycles. PWM signals with larger duty cycles may be selected for use in undervoltage situations.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: May 14, 2019
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Patent number: 10148180
    Abstract: A DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals with different duty cycles. PWM signals with larger duty cycles may be selected for use in undervoltage situations.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: December 4, 2018
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Patent number: 10139888
    Abstract: A system for performing dynamic frequency scaling may include a voltage regulator and a decision block. The decision block may be configured to determine a target frequency of operations for a system on chip.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: November 27, 2018
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventor: Hassan Ihs
  • Publication number: 20180316265
    Abstract: A boost DC-DC converter operating in pulse frequency modulation (PFM) and pulse width modulation (PWM) modes includes a plurality of PWM signal generators. The PWM signal generators generate PWM signals with different duty cycles. PWM signals with larger duty cycles may be selected for use in undervoltage situations.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 1, 2018
    Inventor: Hassan Ihs
  • Patent number: 10116214
    Abstract: A regulated DC-DC switching converter includes a bypass mode in which ends of an output inductor are coupled together. Circuitry determines output capacitor current and load current components of output inductor current during operation of the switching converter, for use in controlling switching operations.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: October 30, 2018
    Assignee: Chaoyang Semiconductor Jiangyin Technology Co., Ltd.
    Inventors: Hassan Ihs, Taner Dosluoglu