Abstract: A hearing aid includes a hearing aid shell, a microphone enclosed within the hearing aid shell, and a sealing member that surrounds the periphery of the microphone enclosed within the hearing aid shell, and a sealing member that surrounds the periphery of the microphone. The sealing member completely fills the area between the periphery of the microphone and the interior surface of the hearing aid shell.

Abstract: A hearing aid includes a circuit board having a battery affixed thereon and a switch that utilizes a portion of the circuit board as a portion of the switch. The battery is permanently affixed to the circuit board in at least one location and at least a portion of the battery is spaced away from the circuit board. The circuit board further includes at least one pair of printed switch traces. The switch is integrated into the circuit board in a way that utilizes the circuit board to form a rotary switch.

Abstract: A hearing aid includes a first portion adapted for behind-the-ear placement having a microphone, a second portion adapted for in-the-canal placement having a receiver and a cable that couples the first portion to the second portion, the cable having an adjustable length.

Abstract: A method and system for providing state-full access to files and resuming access should a connection be broken. A resume key is returned to the client that allows the client to request a duplicate handle to an open file. The duplicate handle can be used to access the file in the same manner as the handle used to open the file. When a connection is broken, the file remains open on the server for a period of time and the state information associated with the file is maintained. Even if a connection is not broken, a client may request one or more duplicate handles and establish other channels (also known as connections) with which to access the file.

Abstract: A hearing aid comprises a microphone that receives incident sound waves from one or more sources external to the hearing aid, and converts the sound waves into electronic signals; a circuit that amplifies the electronic signals; a receiver that converts the amplified electronic signals into amplified sound waves; and a tuned resonant cavity between the microphone and the at least one external sound source. At least one parameter of the tuned resonant cavity is selected to modify the frequency response of the incident sound waves that are received by the microphone. In particular, the geometry of one or more openings through which sound waves enter the chamber, the geometry of the chamber itself, and/or the geometry of one or more openings through which sound waves exit the chamber, are selected to condition the incident sound waves by modifying the frequency response of the audio signal prior to the signal being received at the microphone.

Abstract: A hearing aid includes a circuit board having a battery affixed thereon and a switch that utilizes a portion of the circuit board as a portion of the switch. The battery is permanently affixed to the circuit board in at least one location and at least a portion of the battery is spaced away from the circuit board. The circuit board further includes at least one pair of printed switch traces. The switch is integrated into the circuit board in a way that utilizes the circuit board to form a rotary switch.

Abstract: Described is a mechanism for exposing a volume shadow copy of a shared volume over a network to a remote client. A shared volume is accessed at a client computing system having a root. A volume shadow copy (or “snapshot”) of the volume is identified as a child resource of the shared volume. The child resource representing the snapshot may be hidden from ordinary view by default. To access the snapshot, a user may access the child resource as if it were an ordinary file or directory on the shared volume. Advantageously, the user need not mount a new volume representing the snapshot volume, but rather the user may directly access the snapshot.

Abstract: The present invention provides a processor including a core unit for processing requests from at least one process. The at least one process has a code portion with at least one segment having a first code context identifier. The at least one process also has a data portion with a first data context identifier. The processor further includes a first storage device for storing code address translations and a second storage device for storing data address translations. The processor also includes a code context register coupled to the core unit and to the first storage device, for storing a second code context register. The processor also includes a data context register, coupled to the core unit and to the second storage device for storing a second data context identifier.

Abstract: A method and apparatus for implementing a process having at least one process step, and for transferring data between process steps. The apparatus includes a processor and a processor-readable memory for storing first and second sets of instructions. The first set of processor-readable instructions is operable to provide at least one process module operable to implement at least one process step. The process module has at least one functional option and is operable to receive an input message including at least one input variable to be acted upon by the process module, and an identification of which of the functional options is to be rendered active during execution of the process module. The process module is further operable to provide an output message including at least one output variable produced by the process module and at least one status variable for providing a status indicator produced by the process module.

Abstract: An address translation control circuit which operates in connection with a processor and a translation look-aside buffer ("TLB") to perform virtual-to-physical address translations through shared entries of the TLB. The address translation control circuit comprises a primary context storage element, a group context storage element, a context matching circuit, a comparing unit and a logic unit. The context matching circuit is coupled to primary and group context storage elements to receive their context numbers and reads a context identification number and a context select bit value from a chosen translation entry of the TLB. Concurrently, the comparing unit compares the virtual address contained in that entry with the virtual address requested for translation by the processor. The logic unit receives the outputs from the context matching circuit and the comparing unit and signals operating system software whether an appropriate translation has been found in the TLB.